summaryrefslogtreecommitdiff
path: root/src/northbridge/intel/i945/errata.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/northbridge/intel/i945/errata.c')
-rw-r--r--src/northbridge/intel/i945/errata.c30
1 files changed, 30 insertions, 0 deletions
diff --git a/src/northbridge/intel/i945/errata.c b/src/northbridge/intel/i945/errata.c
new file mode 100644
index 0000000000..8916a4af49
--- /dev/null
+++ b/src/northbridge/intel/i945/errata.c
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2008 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+int fixup_i945_errata(void)
+{
+ u32 reg32;
+
+ /* Mobile Intel 945 Express only */
+ reg32 = MCHBAR32(FSBPMC3);
+ reg32 &= ~((1 << 13) | (1 << 29));
+ MCHBAR32(FSBPMC3) = reg32;
+
+ return 0;
+}