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-rw-r--r--src/northbridge/intel/i945/udelay.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/i945/udelay.c b/src/northbridge/intel/i945/udelay.c
index 90f2638251..8447453435 100644
--- a/src/northbridge/intel/i945/udelay.c
+++ b/src/northbridge/intel/i945/udelay.c
@@ -56,7 +56,7 @@ void udelay(u32 us)
break;
}
- msr = rdmsr(0x198);
+ msr = rdmsr(IA32_PERF_STATUS);
divisor = (msr.hi >> 8) & 0x1f;
d = (fsb * divisor) / 4; /* CPU clock is always a quarter. */