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Diffstat (limited to 'src/northbridge/intel/ironlake/smi.c')
-rw-r--r--src/northbridge/intel/ironlake/smi.c26
1 files changed, 26 insertions, 0 deletions
diff --git a/src/northbridge/intel/ironlake/smi.c b/src/northbridge/intel/ironlake/smi.c
new file mode 100644
index 0000000000..73cd06281b
--- /dev/null
+++ b/src/northbridge/intel/ironlake/smi.c
@@ -0,0 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define __SIMPLE_DEVICE__
+
+#include <types.h>
+#include <device/device.h>
+#include <device/pci_ops.h>
+#include "ironlake.h"
+
+#include <cpu/intel/smm_reloc.h>
+
+void northbridge_write_smram(u8 smram)
+{
+ pci_write_config8(PCI_DEV(QUICKPATH_BUS, 0, 1), QPD0F1_SMRAM, smram);
+}