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-rw-r--r--src/northbridge/intel/pineview/romstage.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/northbridge/intel/pineview/romstage.c b/src/northbridge/intel/pineview/romstage.c
index bdb685b252..a3e6c39172 100644
--- a/src/northbridge/intel/pineview/romstage.c
+++ b/src/northbridge/intel/pineview/romstage.c
@@ -23,7 +23,6 @@
#include <device/pci_ops.h>
#include <cbmem.h>
#include <cf9_reset.h>
-#include <halt.h>
#include <romstage_handoff.h>
#include <southbridge/intel/i82801gx/i82801gx.h>
#include <southbridge/intel/common/gpio.h>