diff options
Diffstat (limited to 'src/northbridge/intel/sandybridge/finalize.c')
| -rw-r--r-- | src/northbridge/intel/sandybridge/finalize.c | 46 |
1 files changed, 22 insertions, 24 deletions
diff --git a/src/northbridge/intel/sandybridge/finalize.c b/src/northbridge/intel/sandybridge/finalize.c index 6a3156e4bc..ab2a21c37f 100644 --- a/src/northbridge/intel/sandybridge/finalize.c +++ b/src/northbridge/intel/sandybridge/finalize.c @@ -16,36 +16,34 @@ #include <device/pci_ops.h> #include "sandybridge.h" -#define PCI_DEV_SNB PCI_DEV(0, 0, 0) - void intel_sandybridge_finalize_smm(void) { - pci_or_config16(PCI_DEV_SNB, GGC, 1 << 0); - pci_or_config16(PCI_DEV_SNB, PAVPC, 1 << 2); - pci_or_config32(PCI_DEV_SNB, DPR, 1 << 0); - pci_or_config32(PCI_DEV_SNB, MESEG_MASK, MELCK); - pci_or_config32(PCI_DEV_SNB, REMAPBASE, 1 << 0); - pci_or_config32(PCI_DEV_SNB, REMAPLIMIT, 1 << 0); - pci_or_config32(PCI_DEV_SNB, TOM, 1 << 0); - pci_or_config32(PCI_DEV_SNB, TOUUD, 1 << 0); - pci_or_config32(PCI_DEV_SNB, BDSM, 1 << 0); - pci_or_config32(PCI_DEV_SNB, BGSM, 1 << 0); - pci_or_config32(PCI_DEV_SNB, TSEGMB, 1 << 0); - pci_or_config32(PCI_DEV_SNB, TOLUD, 1 << 0); + pci_or_config16(HOST_BRIDGE, GGC, 1 << 0); + pci_or_config16(HOST_BRIDGE, PAVPC, 1 << 2); + pci_or_config32(HOST_BRIDGE, DPR, 1 << 0); + pci_or_config32(HOST_BRIDGE, MESEG_MASK, MELCK); + pci_or_config32(HOST_BRIDGE, REMAPBASE, 1 << 0); + pci_or_config32(HOST_BRIDGE, REMAPLIMIT, 1 << 0); + pci_or_config32(HOST_BRIDGE, TOM, 1 << 0); + pci_or_config32(HOST_BRIDGE, TOUUD, 1 << 0); + pci_or_config32(HOST_BRIDGE, BDSM, 1 << 0); + pci_or_config32(HOST_BRIDGE, BGSM, 1 << 0); + pci_or_config32(HOST_BRIDGE, TSEGMB, 1 << 0); + pci_or_config32(HOST_BRIDGE, TOLUD, 1 << 0); - MCHBAR32_OR(MMIO_PAVP_CTL, 1 << 0); /* PAVP */ - MCHBAR32_OR(SAPMCTL, 1 << 31); /* SA PM */ - MCHBAR32_OR(0x6020, 1 << 0); /* UMA GFX */ - MCHBAR32_OR(0x63fc, 1 << 0); /* VTDTRK */ - MCHBAR32_OR(0x6800, 1 << 31); - MCHBAR32_OR(0x7000, 1 << 31); - MCHBAR32_OR(0x77fc, 1 << 0); + MCHBAR32_OR(PAVP_MSG, 1 << 0); /* PAVP */ + MCHBAR32_OR(SAPMCTL, 1 << 31); /* SA PM */ + MCHBAR32_OR(UMAGFXCTL, 1 << 0); /* UMA GFX */ + MCHBAR32_OR(VTDTRKLCK, 1 << 0); /* VTDTRK */ + MCHBAR32_OR(REQLIM, 1 << 31); + MCHBAR32_OR(DMIVCLIM, 1 << 31); + MCHBAR32_OR(CRDTLCK, 1 << 0); /* Memory Controller Lockdown */ MCHBAR8(MC_LOCK) = 0x8f; /* Read+write the following */ - MCHBAR32(0x6030) = MCHBAR32(0x6030); - MCHBAR32(0x6034) = MCHBAR32(0x6034); - MCHBAR32(0x6008) = MCHBAR32(0x6008); + MCHBAR32(VDMBDFBARKVM) = MCHBAR32(VDMBDFBARKVM); + MCHBAR32(VDMBDFBARPAVP) = MCHBAR32(VDMBDFBARPAVP); + MCHBAR32(HDAUDRID) = MCHBAR32(HDAUDRID); } |