diff options
Diffstat (limited to 'src/northbridge/intel/sandybridge/raminit_common.c')
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_common.c | 56 |
1 files changed, 28 insertions, 28 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 44e5d3a8ff..2a521575d8 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -521,68 +521,68 @@ void dram_memorymap(ramctr_timing * ctrl, int me_uma_size) printk(BIOS_DEBUG, "Update PCI-E configuration space:\n"); // TOM (top of memory) - reg = pci_read_config32(PCI_DEV(0, 0, 0), 0xa0); + reg = pci_read_config32(PCI_DEV(0, 0, 0), TOM); val = tom & 0xfff; reg = (reg & ~0xfff00000) | (val << 20); - printk(BIOS_DEBUG, "PCI(0, 0, 0)[%x] = %x\n", 0xa0, reg); - pci_write_config32(PCI_DEV(0, 0, 0), 0xa0, reg); + printk(BIOS_DEBUG, "PCI(0, 0, 0)[%x] = %x\n", TOM, reg); + pci_write_config32(PCI_DEV(0, 0, 0), TOM, reg); - reg = pci_read_config32(PCI_DEV(0, 0, 0), 0xa4); + reg = pci_read_config32(PCI_DEV(0, 0, 0), TOM + 4); val = tom & 0xfffff000; reg = (reg & ~0x000fffff) | (val >> 12); - printk(BIOS_DEBUG, "PCI(0, 0, 0)[%x] = %x\n", 0xa4, reg); - pci_write_config32(PCI_DEV(0, 0, 0), 0xa4, reg); + printk(BIOS_DEBUG, "PCI(0, 0, 0)[%x] = %x\n", TOM + 4, reg); + pci_write_config32(PCI_DEV(0, 0, 0), TOM + 4, reg); // TOLUD (top of low used dram) - reg = pci_read_config32(PCI_DEV(0, 0, 0), 0xbc); + reg = pci_read_config32(PCI_DEV(0, 0, 0), TOLUD); val = toludbase & 0xfff; reg = (reg & ~0xfff00000) | (val << 20); - printk(BIOS_DEBUG, "PCI(0, 0, 0)[%x] = %x\n", 0xbc, reg); - pci_write_config32(PCI_DEV(0, 0, 0), 0xbc, reg); + printk(BIOS_DEBUG, "PCI(0, 0, 0)[%x] = %x\n", TOLUD, reg); + pci_write_config32(PCI_DEV(0, 0, 0), TOLUD, reg); // TOUUD LSB (top of upper usable dram) - reg = pci_read_config32(PCI_DEV(0, 0, 0), 0xa8); + reg = pci_read_config32(PCI_DEV(0, 0, 0), TOUUD); val = touudbase & 0xfff; reg = (reg & ~0xfff00000) | (val << 20); - printk(BIOS_DEBUG, "PCI(0, 0, 0)[%x] = %x\n", 0xa8, reg); - pci_write_config32(PCI_DEV(0, 0, 0), 0xa8, reg); + printk(BIOS_DEBUG, "PCI(0, 0, 0)[%x] = %x\n", TOUUD, reg); + pci_write_config32(PCI_DEV(0, 0, 0), TOUUD, reg); // TOUUD MSB - reg = pci_read_config32(PCI_DEV(0, 0, 0), 0xac); + reg = pci_read_config32(PCI_DEV(0, 0, 0), TOUUD + 4); val = touudbase & 0xfffff000; reg = (reg & ~0x000fffff) | (val >> 12); - printk(BIOS_DEBUG, "PCI(0, 0, 0)[%x] = %x\n", 0xac, reg); - pci_write_config32(PCI_DEV(0, 0, 0), 0xac, reg); + printk(BIOS_DEBUG, "PCI(0, 0, 0)[%x] = %x\n", TOUUD + 4, reg); + pci_write_config32(PCI_DEV(0, 0, 0), TOUUD + 4, reg); if (reclaim) { // REMAP BASE - pci_write_config32(PCI_DEV(0, 0, 0), 0x90, remapbase << 20); - pci_write_config32(PCI_DEV(0, 0, 0), 0x94, remapbase >> 12); + pci_write_config32(PCI_DEV(0, 0, 0), REMAPBASE, remapbase << 20); + pci_write_config32(PCI_DEV(0, 0, 0), REMAPBASE + 4, remapbase >> 12); // REMAP LIMIT - pci_write_config32(PCI_DEV(0, 0, 0), 0x98, remaplimit << 20); - pci_write_config32(PCI_DEV(0, 0, 0), 0x9c, remaplimit >> 12); + pci_write_config32(PCI_DEV(0, 0, 0), REMAPLIMIT, remaplimit << 20); + pci_write_config32(PCI_DEV(0, 0, 0), REMAPLIMIT + 4, remaplimit >> 12); } // TSEG - reg = pci_read_config32(PCI_DEV(0, 0, 0), 0xb8); + reg = pci_read_config32(PCI_DEV(0, 0, 0), TSEGMB); val = tsegbase & 0xfff; reg = (reg & ~0xfff00000) | (val << 20); - printk(BIOS_DEBUG, "PCI(0, 0, 0)[%x] = %x\n", 0xb8, reg); - pci_write_config32(PCI_DEV(0, 0, 0), 0xb8, reg); + printk(BIOS_DEBUG, "PCI(0, 0, 0)[%x] = %x\n", TSEGMB, reg); + pci_write_config32(PCI_DEV(0, 0, 0), TSEGMB, reg); // GFX stolen memory - reg = pci_read_config32(PCI_DEV(0, 0, 0), 0xb0); + reg = pci_read_config32(PCI_DEV(0, 0, 0), BDSM); val = gfxstolenbase & 0xfff; reg = (reg & ~0xfff00000) | (val << 20); - printk(BIOS_DEBUG, "PCI(0, 0, 0)[%x] = %x\n", 0xb0, reg); - pci_write_config32(PCI_DEV(0, 0, 0), 0xb0, reg); + printk(BIOS_DEBUG, "PCI(0, 0, 0)[%x] = %x\n", BDSM, reg); + pci_write_config32(PCI_DEV(0, 0, 0), BDSM, reg); // GTT stolen memory - reg = pci_read_config32(PCI_DEV(0, 0, 0), 0xb4); + reg = pci_read_config32(PCI_DEV(0, 0, 0), BGSM); val = gttbase & 0xfff; reg = (reg & ~0xfff00000) | (val << 20); - printk(BIOS_DEBUG, "PCI(0, 0, 0)[%x] = %x\n", 0xb4, reg); - pci_write_config32(PCI_DEV(0, 0, 0), 0xb4, reg); + printk(BIOS_DEBUG, "PCI(0, 0, 0)[%x] = %x\n", BGSM, reg); + pci_write_config32(PCI_DEV(0, 0, 0), BGSM, reg); if (me_uma_size) { reg = pci_read_config32(PCI_DEV(0, 0, 0), 0x7c); |