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-rw-r--r--src/northbridge/intel/sandybridge/northbridge.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index e3290d8985..4cd86cd9df 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -274,9 +274,7 @@ static void pci_domain_set_resources(device_t dev)
assign_resources(dev->link_list);
- /* Leave some space for ACPI, PIRQ and MP tables */
- high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
- high_tables_size = HIGH_MEMORY_SIZE;
+ set_top_of_ram(tomk * 1024);
}
/* TODO We could determine how many PCIe busses we need in