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Diffstat (limited to 'src/northbridge/intel/x4x/memmap.c')
-rw-r--r-- | src/northbridge/intel/x4x/memmap.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/northbridge/intel/x4x/memmap.c b/src/northbridge/intel/x4x/memmap.c index db0ab9c9fb..aa737f391f 100644 --- a/src/northbridge/intel/x4x/memmap.c +++ b/src/northbridge/intel/x4x/memmap.c @@ -104,7 +104,6 @@ static uintptr_t northbridge_get_tseg_base(void) return pci_read_config32(HOST_BRIDGE, D0F0_TSEG); } - /* Depending of UMA and TSEG configuration, TSEG might start at any * 1 MiB alignment. As this may cause very greedy MTRR setup, push * CBMEM top downwards to 4 MiB boundary. |