diff options
Diffstat (limited to 'src/northbridge/intel/x4x')
-rw-r--r-- | src/northbridge/intel/x4x/ram_calc.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/northbridge/intel/x4x/ram_calc.c b/src/northbridge/intel/x4x/ram_calc.c index 371496985f..be9c10f001 100644 --- a/src/northbridge/intel/x4x/ram_calc.c +++ b/src/northbridge/intel/x4x/ram_calc.c @@ -134,8 +134,6 @@ void *cbmem_top(void) return (void *) top_of_ram; } -#define ROMSTAGE_RAM_STACK_SIZE 0x5000 - /* platform_enter_postcar() determines the stack to use after * cache-as-ram is torn down as well as the MTRR settings to use, * and continues execution in postcar stage. */ @@ -144,7 +142,7 @@ void platform_enter_postcar(void) struct postcar_frame pcf; uintptr_t top_of_ram; - if (postcar_frame_init(&pcf, ROMSTAGE_RAM_STACK_SIZE)) + if (postcar_frame_init(&pcf, 0)) die("Unable to initialize postcar frame.\n"); /* Cache the ROM as WP just below 4GiB. */ |