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-rw-r--r--src/northbridge/intel/sandybridge/Kconfig4
-rw-r--r--src/northbridge/intel/sandybridge/Makefile.inc3
-rw-r--r--src/northbridge/intel/sandybridge/bootblock.c7
3 files changed, 5 insertions, 9 deletions
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
index 288dd093bf..0502b50014 100644
--- a/src/northbridge/intel/sandybridge/Kconfig
+++ b/src/northbridge/intel/sandybridge/Kconfig
@@ -62,10 +62,6 @@ config VGA_BIOS_ID
string
default "8086,0106"
-config BOOTBLOCK_NORTHBRIDGE_INIT
- string
- default "northbridge/intel/sandybridge/bootblock.c"
-
config MMCONF_BASE_ADDRESS
hex
default 0xf0000000
diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc
index 77d1fdbb84..7390d2b40b 100644
--- a/src/northbridge/intel/sandybridge/Makefile.inc
+++ b/src/northbridge/intel/sandybridge/Makefile.inc
@@ -15,6 +15,8 @@
ifeq ($(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE),y)
+bootblock-y += bootblock.c
+
ramstage-y += memmap.c
ramstage-y += northbridge.c
ramstage-y += pcie.c
@@ -44,7 +46,6 @@ mrc.bin-type := mrc
endif
romstage-y += romstage.c
romstage-y += early_init.c
-romstage-y += ../../../arch/x86/walkcbfs.S
smm-y += finalize.c
diff --git a/src/northbridge/intel/sandybridge/bootblock.c b/src/northbridge/intel/sandybridge/bootblock.c
index 15e2de1bcc..40819bf7eb 100644
--- a/src/northbridge/intel/sandybridge/bootblock.c
+++ b/src/northbridge/intel/sandybridge/bootblock.c
@@ -12,11 +12,10 @@
*/
#include <device/pci_ops.h>
+#include <cpu/intel/car/bootblock.h>
+#include "sandybridge.h"
-/* Just re-define this instead of including sandybridge.h. It blows up romcc. */
-#define PCIEXBAR 0x60
-
-static void bootblock_northbridge_init(void)
+void bootblock_early_northbridge_init(void)
{
uint32_t reg;