diff options
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r-- | src/northbridge/intel/sandybridge/raminit_common.c | 39 |
1 files changed, 34 insertions, 5 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 5347c5c493..53f28c6cd6 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -1524,6 +1524,24 @@ static void test_timC(ramctr_timing * ctrl, int channel, int slotrank) wait_428c(channel); } +static void timC_threshold_process(int *data, const int count) +{ + int min = data[0]; + int max = min; + int i; + for (i = 1; i < count; i++) { + if (min > data[i]) + min = data[i]; + if (max < data[i]) + max = data[i]; + } + int threshold = min/2 + max/2; + for (i = 0; i < count; i++) + data[i] = data[i] > threshold; + printram("threshold=%d min=%d max=%d\n", + threshold, min, max); +} + static int discover_timC(ramctr_timing *ctrl, int channel, int slotrank) { int timC; @@ -1554,14 +1572,25 @@ static int discover_timC(ramctr_timing *ctrl, int channel, int slotrank) } } FOR_ALL_LANES { - struct run rn = - get_longest_zero_run(statistics[lane], MAX_TIMC + 1); - ctrl->timings[channel][slotrank].lanes[lane].timC = rn.middle; - if (rn.all) { + struct run rn = get_longest_zero_run( + statistics[lane], ARRAY_SIZE(statistics[lane])); + if (rn.all || rn.length < 8) { printk(BIOS_EMERG, "timC discovery failed: %d, %d, %d\n", channel, slotrank, lane); - return MAKE_ERR; + /* With command training not happend yet, the lane can + * be erroneous. Take the avarage as reference and try + * again to find a run. + */ + timC_threshold_process(statistics[lane], + ARRAY_SIZE(statistics[lane])); + rn = get_longest_zero_run(statistics[lane], + ARRAY_SIZE(statistics[lane])); + if (rn.all || rn.length < 8) { + printk(BIOS_EMERG, "timC recovery failed\n"); + return MAKE_ERR; + } } + ctrl->timings[channel][slotrank].lanes[lane].timC = rn.middle; printram("timC: %d, %d, %d: 0x%02x-0x%02x-0x%02x\n", channel, slotrank, lane, rn.start, rn.middle, rn.end); } |