diff options
Diffstat (limited to 'src/northbridge/via/cn700')
| -rw-r--r-- | src/northbridge/via/cn700/raminit.c | 6 | ||||
| -rw-r--r-- | src/northbridge/via/cn700/vga.c | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/northbridge/via/cn700/raminit.c b/src/northbridge/via/cn700/raminit.c index 63dab5b3e0..20b0afeb6e 100644 --- a/src/northbridge/via/cn700/raminit.c +++ b/src/northbridge/via/cn700/raminit.c @@ -51,7 +51,7 @@ static void do_ram_command(device_t dev, u8 command) } /** - * Configure the bus between the CPU and the northbridge. This might be able to + * Configure the bus between the CPU and the northbridge. This might be able to * be moved to post-ram code in the future. For the most part, these registers * should not be messed around with. These are too complex to explain short of * copying the datasheets into the comments, but most of these values are from @@ -244,7 +244,7 @@ static void sdram_set_size(const struct mem_controller *ctrl) } /** - * Set up various RAM and other control registers statically. Some of these may + * Set up various RAM and other control registers statically. Some of these may * not be needed, other should be done with SPD info, but that's a project for * the future. */ @@ -422,7 +422,7 @@ static void sdram_enable(device_t dev, unsigned long rank_address) PRINT_DEBUG_MEM("RAM Enable 4: Mode register set\n"); /* Safe value for now, BL=8, WR=5, CAS=4 */ /* - * (E)MRS values are from the BPG. No direct explanation is given, but + * (E)MRS values are from the BPG. No direct explanation is given, but * they should somehow conform to the JEDEC DDR2 SDRAM Specification * (JESD79-2C). */ diff --git a/src/northbridge/via/cn700/vga.c b/src/northbridge/via/cn700/vga.c index 69f188b01e..33d1fe0071 100644 --- a/src/northbridge/via/cn700/vga.c +++ b/src/northbridge/via/cn700/vga.c @@ -62,7 +62,7 @@ static int via_cn700_int15_handler(struct eregs *regs) case 0x5f02: regs->eax=0x5f; regs->ebx= (regs->ebx & 0xffff0000) | 2; - regs->ecx= (regs->ecx & 0xffff0000) | 0x401; // PAL + crt only + regs->ecx= (regs->ecx & 0xffff0000) | 0x401; // PAL + crt only regs->edx= (regs->edx & 0xffff0000) | 0; // TV Layout - default res=0; break; @@ -70,7 +70,7 @@ static int via_cn700_int15_handler(struct eregs *regs) regs->eax=0x860f; break; default: - printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n", + printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n", regs->eax & 0xffff); break; } |