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-rw-r--r--src/northbridge/via/vx800/examples/romstage.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/src/northbridge/via/vx800/examples/romstage.c b/src/northbridge/via/vx800/examples/romstage.c
index c7efb51791..80ee22c22a 100644
--- a/src/northbridge/via/vx800/examples/romstage.c
+++ b/src/northbridge/via/vx800/examples/romstage.c
@@ -31,16 +31,14 @@
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
#include "lib/ramtest.c"
#include "northbridge/via/vx800/vx800.h"
#include "cpu/x86/mtrr/earlymtrr.c"
#include "cpu/x86/bist.h"
#include "pc80/udelay_io.c"
#include "lib/delay.c"
-#if CONFIG_USE_INIT == 0
#include "lib/memcpy.c"
-#endif
#include "cpu/x86/lapic/boot_cpu.c"
#include "driving_clk_phase_data.c"
@@ -573,7 +571,7 @@ So, I use: #include "cpu/via/car/cache_as_ram_post.c". my via-version post.c hav
unsigned v_esp;
__asm__ volatile ("movl %%esp, %0\n\t":"=a" (v_esp)
);
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, "v_esp=%08x\r\n", v_esp);
#else
print_debug("v_esp=");
@@ -589,7 +587,7 @@ So, I use: #include "cpu/via/car/cache_as_ram_post.c". my via-version post.c hav
// it seems that cpu_reset is not used before this, so I just reset it, (this is because the s3 resume, setting in mtrr and copy data may destroy
//stack
cpu_reset = 0;
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, "cpu_reset = %08x\r\n", cpu_reset);
#else
print_debug("cpu_reset = ");
@@ -641,7 +639,7 @@ So, I use: #include "cpu/via/car/cache_as_ram_post.c". my via-version post.c hav
} else {
print_debug("Use Ram as Stack now - \r\n");
}
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, "new_cpu_reset = %08x\r\n", new_cpu_reset);
#else
print_debug("new_cpu_reset = ");