diff options
Diffstat (limited to 'src/northbridge/via/vx900/Makefile.inc')
-rw-r--r-- | src/northbridge/via/vx900/Makefile.inc | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/src/northbridge/via/vx900/Makefile.inc b/src/northbridge/via/vx900/Makefile.inc new file mode 100644 index 0000000000..3e0d9c7692 --- /dev/null +++ b/src/northbridge/via/vx900/Makefile.inc @@ -0,0 +1,37 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2011-2013 Alexandru Gagniuc <mr.nuke.me@gmail.com> +## +## This program is free software: you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation, either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program. If not, see <http://www.gnu.org/licenses/>. +## + +romstage-y += pci_util.c +romstage-y += early_smbus.c +romstage-y += early_vx900.c +romstage-y += early_host_bus_ctl.c +#romstage-y += raminit_ddr3.c +romstage-y += ./../../../device/dram/ddr3.c +romstage-y += ./../../../southbridge/via/common/early_smbus_delay.c +romstage-y += ./../../../southbridge/via/common/early_smbus_is_busy.c +romstage-y += ./../../../southbridge/via/common/early_smbus_print_error.c +romstage-y += ./../../../southbridge/via/common/early_smbus_reset.c +romstage-y += ./../../../southbridge/via/common/early_smbus_wait_until_ready.c +romstage-y += ./../../../drivers/pc80/udelay_io.c +romstage-$(CONFIG_COLLECT_TIMESTAMPS) += ./../../../lib/cbmem.c + + + +chipset_bootblock_inc += $(src)/northbridge/via/vx900/romstrap.inc +chipset_bootblock_lds += $(src)/northbridge/via/vx900/romstrap.lds |