diff options
Diffstat (limited to 'src/northbridge/via')
25 files changed, 286 insertions, 291 deletions
diff --git a/src/northbridge/via/cn400/agp.c b/src/northbridge/via/cn400/agp.c index c9cca61759..a302759371 100644 --- a/src/northbridge/via/cn400/agp.c +++ b/src/northbridge/via/cn400/agp.c @@ -36,7 +36,7 @@ static void agp_init(device_t dev) int i, j; /* Some of this may not be necessary (should be handled by the OS). */ - printk_debug("Enabling AGP.\n"); + printk(BIOS_DEBUG, "Enabling AGP.\n"); /* Allow R/W access to AGP registers. */ pci_write_config8(dev, 0x4d, 0x05); @@ -113,17 +113,17 @@ static void agp_init(device_t dev) pci_write_config8(dev, 0xc1, 0x02); #ifdef DEBUG_CN400 - printk_spew("%s PCI Header Regs::\n", dev_path(dev)); + printk(BIOS_SPEW, "%s PCI Header Regs::\n", dev_path(dev)); for (i = 0 ; i < 16; i++) { - printk_spew("%02X: ", i*16); + printk(BIOS_SPEW, "%02X: ", i*16); for (j = 0; j < 16; j++) { reg8 = pci_read_config8(dev, j+(i*16)); - printk_spew("%02X ", reg8); + printk(BIOS_SPEW, "%02X ", reg8); } - printk_spew("\n"); + printk(BIOS_SPEW, "\n"); } #endif } @@ -170,7 +170,7 @@ static void agp_bridge_init(device_t dev) u8 reg8; int i, j; - printk_debug("Entering %s\n", __func__); + printk(BIOS_DEBUG, "Entering %s\n", __func__); pci_write_config16(dev, 0x4, 0x0107); @@ -208,17 +208,17 @@ static void agp_bridge_init(device_t dev) pci_write_config8(dev, 0x44, 0x34); pci_write_config8(dev, 0x45, 0x72); - printk_spew("%s PCI Header Regs::\n", dev_path(dev)); + printk(BIOS_SPEW, "%s PCI Header Regs::\n", dev_path(dev)); for (i = 0 ; i < 16; i++) { - printk_spew("%02X: ", i*16); + printk(BIOS_SPEW, "%02X: ", i*16); for (j = 0; j < 16; j++) { reg8 = pci_read_config8(dev, j+(i*16)); - printk_spew("%02X ", reg8); + printk(BIOS_SPEW, "%02X ", reg8); } - printk_spew("\n"); + printk(BIOS_SPEW, "\n"); } } diff --git a/src/northbridge/via/cn400/northbridge.c b/src/northbridge/via/cn400/northbridge.c index 86dea8d3c7..cd6a2abed9 100644 --- a/src/northbridge/via/cn400/northbridge.c +++ b/src/northbridge/via/cn400/northbridge.c @@ -41,7 +41,7 @@ static void memctrl_init(device_t dev) u8 ranks, pagec, paged, pagee, pagef, shadowreg, reg8; int i, j; - printk_spew("Entering cn400 memctrl_init.\n"); + printk(BIOS_SPEW, "Entering cn400 memctrl_init.\n"); /* vlink mirror */ vlink_dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_CN400_VLINK, 0); @@ -53,7 +53,7 @@ static void memctrl_init(device_t dev) reg16 = (((u16)(ranks - 1) << 9) & 0xFFF0) | 0x01F0; pci_write_config16(dev, 0x84, reg16); - printk_spew("Low Top Address = 0x%04X\n", reg16); + printk(BIOS_SPEW, "Low Top Address = 0x%04X\n", reg16); /* Set up the VGA framebuffer size and Base Address */ /* Note dependencies between agp.c and vga.c and here */ @@ -110,20 +110,20 @@ static void memctrl_init(device_t dev) pci_write_config8(dev, 0xA0, reg8); #ifdef DEBUG_CN400 - printk_spew("%s PCI Header Regs::\n", dev_path(dev)); + printk(BIOS_SPEW, "%s PCI Header Regs::\n", dev_path(dev)); for (i = 0 ; i < 16; i++) { - printk_spew("%02X: ", i*16); + printk(BIOS_SPEW, "%02X: ", i*16); for (j = 0; j < 16; j++) { reg8 = pci_read_config8(dev, j+(i*16)); - printk_spew("%02X ", reg8); + printk(BIOS_SPEW, "%02X ", reg8); } - printk_spew("\n"); + printk(BIOS_SPEW, "\n"); } #endif - printk_spew("Leaving cn400 %s.\n", __func__); + printk(BIOS_SPEW, "Leaving cn400 %s.\n", __func__); } static const struct device_operations memctrl_operations = { @@ -144,7 +144,7 @@ static void cn400_domain_read_resources(device_t dev) { struct resource *resource; - printk_spew("Entering %s.\n", __func__); + printk(BIOS_SPEW, "Entering %s.\n", __func__); /* Initialize the system wide I/O space constraints. */ resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); @@ -158,7 +158,7 @@ static void cn400_domain_read_resources(device_t dev) resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - printk_spew("Leaving %s.\n", __func__); + printk(BIOS_SPEW, "Leaving %s.\n", __func__); } static void ram_resource(device_t dev, unsigned long index, @@ -180,7 +180,7 @@ static void ram_reservation(device_t dev, unsigned long index, { struct resource *res; - printk_spew("Configuring Via C3 LAPIC Fixed Resource\n"); + printk(BIOS_SPEW, "Configuring Via C3 LAPIC Fixed Resource\n"); /* Fixed LAPIC resource */ res = new_resource(dev, 1); res->base = (resource_t) base; @@ -205,7 +205,7 @@ static u32 find_pci_tolm(struct bus *bus) struct resource *min = NULL; u32 tolm; - printk_spew("Entering CN400 find_pci_tolm\n"); + printk(BIOS_SPEW, "Entering CN400 find_pci_tolm\n"); search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, &min); @@ -213,7 +213,7 @@ static u32 find_pci_tolm(struct bus *bus) if (min && tolm > min->base) tolm = min->base; - printk_spew("Leaving CN400 find_pci_tolm\n"); + printk(BIOS_SPEW, "Leaving CN400 find_pci_tolm\n"); return tolm; } @@ -229,7 +229,7 @@ static void cn400_domain_set_resources(device_t dev) device_t mc_dev; u32 pci_tolm; - printk_spew("Entering %s.\n", __func__); + printk(BIOS_SPEW, "Entering %s.\n", __func__); pci_tolm = find_pci_tolm(&dev->link[0]); mc_dev = dev_find_device(PCI_VENDOR_ID_VIA, @@ -244,7 +244,7 @@ static void cn400_domain_set_resources(device_t dev) tomk = rambits * 32 * 1024; /* Compute the Top Of Low Memory (TOLM), in Kb. */ tolmk = pci_tolm >> 10; - printk_spew("tomk is 0x%x, tolmk is 0x%08X\n", tomk, tolmk); + printk(BIOS_SPEW, "tomk is 0x%x, tolmk is 0x%08X\n", tomk, tolmk); if (tolmk >= tomk) { /* The PCI hole does does not overlap the memory. */ tolmk = tomk; @@ -254,7 +254,7 @@ static void cn400_domain_set_resources(device_t dev) /* Locate the High Tables at the Top of Low Memory below the Video RAM */ high_tables_base = (uint64_t) (tolmk - (CONFIG_VIDEO_MB *1024) - HIGH_TABLES_SIZE) * 1024; high_tables_size = (uint64_t) HIGH_TABLES_SIZE* 1024; - printk_spew("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); + printk(BIOS_SPEW, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); #endif /* Report the memory regions. */ @@ -267,12 +267,12 @@ static void cn400_domain_set_resources(device_t dev) } assign_resources(&dev->link[0]); - printk_spew("Leaving %s.\n", __func__); + printk(BIOS_SPEW, "Leaving %s.\n", __func__); } static unsigned int cn400_domain_scan_bus(device_t dev, unsigned int max) { - printk_debug("Entering %s.\n", __func__); + printk(BIOS_DEBUG, "Entering %s.\n", __func__); max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); return max; @@ -305,7 +305,7 @@ static const struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { - printk_spew("In cn400 enable_dev for device %s.\n", dev_path(dev)); + printk(BIOS_SPEW, "In cn400 enable_dev for device %s.\n", dev_path(dev)); /* Set the operations if it is a special bus type. */ if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { diff --git a/src/northbridge/via/cn400/vga.c b/src/northbridge/via/cn400/vga.c index 5a58d17550..ac222ff157 100644 --- a/src/northbridge/via/cn400/vga.c +++ b/src/northbridge/via/cn400/vga.c @@ -52,14 +52,14 @@ static void vga_init(device_t dev) #endif temp = (0xffffffff - CONFIG_FALLBACK_SIZE - 0xffff); - printk_debug("Copying BOCHS BIOS from 0x%08X to 0xf000\n", temp); + printk(BIOS_DEBUG, "Copying BOCHS BIOS from 0x%08X to 0xf000\n", temp); /* * Copy BOCHS BIOS from 4G-CONFIG_FALLBACK_SIZE-64k (in flash) to 0xf0000 (in RAM) * This is for compatibility with the VGA ROM's BIOS callbacks. */ //memcpy(0xf0000, (0xffffffff - CONFIG_ROM_SIZE - 0xffff), 0x10000); memcpy(0xf0000, temp, 0x10000); - printk_debug("Initializing VGA\n"); + printk(BIOS_DEBUG, "Initializing VGA\n"); /* Set memory rate to 200 MHz. */ outb(0x3d, CRTM_INDEX); @@ -79,12 +79,12 @@ static void vga_init(device_t dev) pci_write_config32(dev, 0x10, 0xf0000008); pci_write_config32(dev, 0x14, 0xf4000000); - printk_debug("INSTALL REAL-MODE IDT\n"); + printk(BIOS_DEBUG, "INSTALL REAL-MODE IDT\n"); setup_realmode_idt(); - printk_debug("DO THE VGA BIOS\n"); + printk(BIOS_DEBUG, "DO THE VGA BIOS\n"); do_vgabios(); /* VGA seems to work without this, but crash & burn with it. */ - // printk_debug("Enable VGA console\n"); + // printk(BIOS_DEBUG, "Enable VGA console\n"); // vga_enable_console(); /* It's not clear if these need to be programmed before or after @@ -106,17 +106,17 @@ static void vga_init(device_t dev) memset(0xf0000, 0, 0x10000); #ifdef DEBUG_CN400 - printk_spew("%s PCI Header Regs::\n", dev_path(dev)); + printk(BIOS_SPEW, "%s PCI Header Regs::\n", dev_path(dev)); for (i = 0 ; i < 16; i++) { - printk_spew("%02X: ", i*16); + printk(BIOS_SPEW, "%02X: ", i*16); for (j = 0; j < 16; j++) { reg8 = pci_read_config8(dev, j+(i*16)); - printk_spew("%02X ", reg8); + printk(BIOS_SPEW, "%02X ", reg8); } - printk_spew("\n"); + printk(BIOS_SPEW, "\n"); } #endif } diff --git a/src/northbridge/via/cn400/vgabios.c b/src/northbridge/via/cn400/vgabios.c index 9620debe9b..0b1cff7541 100644 --- a/src/northbridge/via/cn400/vgabios.c +++ b/src/northbridge/via/cn400/vgabios.c @@ -349,17 +349,17 @@ void do_vgabios(void) dev = dev_find_class(PCI_CLASS_DISPLAY_VGA<<8 , 0); if (!dev) { - printk_debug("NO VGA FOUND\n"); + printk(BIOS_DEBUG, "NO VGA FOUND\n"); return; } - printk_debug("found VGA: vid=%x, did=%x\n", dev->vendor, dev->device); + printk(BIOS_DEBUG, "found VGA: vid=%x, did=%x\n", dev->vendor, dev->device); /* declare rom address here - keep any config data out of the way * of core LXB stuff */ rom = cbfs_load_optionrom(dev->vendor, dev->device, 0); pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1); - printk_debug("VGA BIOS ROM base address: %x\n", rom); + printk(BIOS_DEBUG, "VGA BIOS ROM base address: %x\n", rom); buf = (unsigned char *) rom; if ((buf[0] == 0x55) && (buf[1] == 0xaa)) { @@ -371,13 +371,13 @@ void do_vgabios(void) buf = (unsigned char *) 0xc0000; if (buf[0]==0x55 && buf[1]==0xAA) { busdevfn = (dev->bus->secondary << 8) | dev->path.pci.devfn; - printk_debug("bus/devfn = %#x\n", busdevfn); + printk(BIOS_DEBUG, "bus/devfn = %#x\n", busdevfn); real_mode_switch_call_vga(busdevfn); } else - printk_debug("Failed to copy VGA BIOS to 0xc0000\n"); + printk(BIOS_DEBUG, "Failed to copy VGA BIOS to 0xc0000\n"); } else - printk_debug("BAD SIGNATURE 0x%x 0x%x\n", buf[0], buf[1]); + printk(BIOS_DEBUG, "BAD SIGNATURE 0x%x 0x%x\n", buf[0], buf[1]); pci_write_config32(dev, PCI_ROM_ADDRESS, 0); } @@ -562,28 +562,28 @@ int biosint(unsigned long intnumber, cs = cs_ip >> 16; flags = stackflags; - printk_debug("biosint: INT# 0x%lx\n", intnumber); - printk_debug("biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n", + printk(BIOS_DEBUG, "biosint: INT# 0x%lx\n", intnumber); + printk(BIOS_DEBUG, "biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n", eax, ebx, ecx, edx); - printk_debug("biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n", + printk(BIOS_DEBUG, "biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n", ebp, esp, edi, esi); - printk_debug("biosint: ip 0x%x cs 0x%x flags 0x%x\n", + printk(BIOS_DEBUG, "biosint: ip 0x%x cs 0x%x flags 0x%x\n", ip, cs, flags); // cases in a good compiler are just as good as your own tables. switch (intnumber) { case 0 ... 15: // These are not BIOS service, but the CPU-generated exceptions - printk_info("biosint: Oops, exception %u\n", intnumber); + printk(BIOS_INFO, "biosint: Oops, exception %u\n", intnumber); if (esp < 0x1000) { - printk_debug("Stack contents: "); + printk(BIOS_DEBUG, "Stack contents: "); while (esp < 0x1000) { - printk_debug("0x%04x ", *(unsigned short *) esp); + printk(BIOS_DEBUG, "0x%04x ", *(unsigned short *) esp); esp += 2; } - printk_debug("\n"); + printk(BIOS_DEBUG, "\n"); } - printk_debug("biosint: Bailing out\n"); + printk(BIOS_DEBUG, "biosint: Bailing out\n"); // "longjmp" vga_exit(); break; @@ -602,7 +602,7 @@ int biosint(unsigned long intnumber, &ebx, &edx, &ecx, &eax, &flags); break; default: - printk_info("BIOSINT: Unsupport int #0x%x\n", + printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%x\n", intnumber); break; } @@ -728,7 +728,7 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, // devfn is an int, so we mask it off. busdevfn = (dev->bus->secondary << 8) | (dev->path.pci.devfn & 0xff); - printk_debug("0x%x: return 0x%x\n", func, busdevfn); + printk(BIOS_DEBUG, "0x%x: return 0x%x\n", func, busdevfn); *pebx = busdevfn; retval = 0; } else { @@ -754,7 +754,7 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, reg = *pedi; dev = dev_find_slot(bus, devfn); if (! dev) { - printk_debug("0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn); + printk(BIOS_DEBUG, "0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn); // idiots. the pcibios guys assumed you'd never pass a bad bus/devfn! *peax = PCIBIOS_BADREG; retval = -1; @@ -788,14 +788,14 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, if (retval) retval = PCIBIOS_BADREG; - printk_debug("0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n", + printk(BIOS_DEBUG, "0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n", func, bus, devfn, reg, *pecx); *peax = 0; retval = 0; } break; default: - printk_err("UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func); + printk(BIOS_ERR, "UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func); break; } diff --git a/src/northbridge/via/cn400/vlink.c b/src/northbridge/via/cn400/vlink.c index 1542af71fe..dc574c130d 100644 --- a/src/northbridge/via/cn400/vlink.c +++ b/src/northbridge/via/cn400/vlink.c @@ -43,7 +43,7 @@ static void vlink_init(device_t dev) u8 reg, reg8; int i, j; - printk_spew("Entering CN400 %s\n", __func__); + printk(BIOS_SPEW, "Entering CN400 %s\n", __func__); /* Disconnect the VLink Before Changing Settings */ reg = pci_read_config8(dev, 0x47); @@ -107,17 +107,17 @@ static void vlink_init(device_t dev) reg &= ~0x04; pci_write_config8(dev, 0x47, reg); - printk_spew("%s PCI Header Regs::\n", dev_path(dev)); + printk(BIOS_SPEW, "%s PCI Header Regs::\n", dev_path(dev)); for (i = 0 ; i < 16; i++) { - printk_spew("%02X: ", i*16); + printk(BIOS_SPEW, "%02X: ", i*16); for (j = 0; j < 16; j++) { reg8 = pci_read_config8(dev, j+(i*16)); - printk_spew("%02X ", reg8); + printk(BIOS_SPEW, "%02X ", reg8); } - printk_spew("\n"); + printk(BIOS_SPEW, "\n"); } #endif } @@ -141,19 +141,19 @@ static void c3_host_init(device_t dev) u8 reg8; int i, j; - printk_spew("Entering CN400 %s\n", __func__); + printk(BIOS_SPEW, "Entering CN400 %s\n", __func__); - printk_spew("%s PCI Header Regs::\n", dev_path(dev)); + printk(BIOS_SPEW, "%s PCI Header Regs::\n", dev_path(dev)); for (i = 0 ; i < 16; i++) { - printk_spew("%02X: ", i*16); + printk(BIOS_SPEW, "%02X: ", i*16); for (j = 0; j < 16; j++) { reg8 = pci_read_config8(dev, j+(i*16)); - printk_spew("%02X ", reg8); + printk(BIOS_SPEW, "%02X ", reg8); } - printk_spew("\n"); + printk(BIOS_SPEW, "\n"); } } @@ -178,19 +178,19 @@ static void c3_err_init(device_t dev) u8 reg8; int i, j; - printk_spew("Entering CN400 %s\n", __func__); + printk(BIOS_SPEW, "Entering CN400 %s\n", __func__); - printk_spew("%s PCI Header Regs::\n", dev_path(dev)); + printk(BIOS_SPEW, "%s PCI Header Regs::\n", dev_path(dev)); for (i = 0 ; i < 16; i++) { - printk_spew("%02X: ", i*16); + printk(BIOS_SPEW, "%02X: ", i*16); for (j = 0; j < 16; j++) { reg8 = pci_read_config8(dev, j+(i*16)); - printk_spew("%02X ", reg8); + printk(BIOS_SPEW, "%02X ", reg8); } - printk_spew("\n"); + printk(BIOS_SPEW, "\n"); } } @@ -214,19 +214,19 @@ static void cn400_pm_init(device_t dev) u8 reg8; int i, j; - printk_spew("Entering CN400 %s\n", __func__); + printk(BIOS_SPEW, "Entering CN400 %s\n", __func__); - printk_spew("%s PCI Header Regs::\n", dev_path(dev)); + printk(BIOS_SPEW, "%s PCI Header Regs::\n", dev_path(dev)); for (i = 0 ; i < 16; i++) { - printk_spew("%02X: ", i*16); + printk(BIOS_SPEW, "%02X: ", i*16); for (j = 0; j < 16; j++) { reg8 = pci_read_config8(dev, j+(i*16)); - printk_spew("%02X ", reg8); + printk(BIOS_SPEW, "%02X ", reg8); } - printk_spew("\n"); + printk(BIOS_SPEW, "\n"); } } diff --git a/src/northbridge/via/cn700/agp.c b/src/northbridge/via/cn700/agp.c index 6ae8e78361..327fac4ea2 100644 --- a/src/northbridge/via/cn700/agp.c +++ b/src/northbridge/via/cn700/agp.c @@ -34,7 +34,7 @@ static void agp_init(device_t dev) u32 reg32; /* Some of this may not be necessary (should be handled by the OS). */ - printk_debug("Enabling AGP.\n"); + printk(BIOS_DEBUG, "Enabling AGP.\n"); /* Allow R/W access to AGP registers. */ pci_write_config8(dev, 0x4d, 0x15); @@ -124,7 +124,7 @@ static const struct pci_driver agp_driver __pci_driver = { */ static void agp_bridge_init(device_t dev) { - printk_debug("Setting up AGP bridge device\n"); + printk(BIOS_DEBUG, "Setting up AGP bridge device\n"); pci_write_config16(dev, 0x4, 0x0007); diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c index db0a1cfe5d..2be45f7b83 100644 --- a/src/northbridge/via/cn700/northbridge.c +++ b/src/northbridge/via/cn700/northbridge.c @@ -155,7 +155,7 @@ static void pci_domain_set_resources(device_t dev) device_t mc_dev; u32 pci_tolm; - printk_spew("Entering cn700 pci_domain_set_resources.\n"); + printk(BIOS_SPEW, "Entering cn700 pci_domain_set_resources.\n"); pci_tolm = find_pci_tolm(&dev->link[0]); mc_dev = dev_find_device(PCI_VENDOR_ID_VIA, @@ -177,7 +177,7 @@ static void pci_domain_set_resources(device_t dev) } tomk = rambits * 64 * 1024; - printk_spew("tomk is 0x%x\n", tomk); + printk(BIOS_SPEW, "tomk is 0x%x\n", tomk); /* Compute the Top Of Low Memory (TOLM), in Kb. */ tolmk = pci_tolm >> 10; if (tolmk >= tomk) { @@ -188,7 +188,7 @@ static void pci_domain_set_resources(device_t dev) #if CONFIG_WRITE_HIGH_TABLES == 1 high_tables_base = (tolmk - CONFIG_VIDEO_MB * 1024 - HIGH_TABLES_SIZE) * 1024; high_tables_size = HIGH_TABLES_SIZE * 1024; - printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); + printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); #endif /* Report the memory regions. */ @@ -229,7 +229,7 @@ static const struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { - printk_spew("In cn700 enable_dev for device %s.\n", dev_path(dev)); + printk(BIOS_SPEW, "In cn700 enable_dev for device %s.\n", dev_path(dev)); /* Set the operations if it is a special bus type. */ if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { diff --git a/src/northbridge/via/cn700/vga.c b/src/northbridge/via/cn700/vga.c index e4f9d93b6f..283f23dd16 100644 --- a/src/northbridge/via/cn700/vga.c +++ b/src/northbridge/via/cn700/vga.c @@ -54,7 +54,7 @@ static void vga_init(device_t dev) */ memcpy(0xf0000, (0xffffffff - CONFIG_ROM_SIZE - 0xffff), 0x10000); - printk_debug("Initializing VGA\n"); + printk(BIOS_DEBUG, "Initializing VGA\n"); /* Set memory rate to 200 MHz. */ outb(0x3d, CRTM_INDEX); @@ -74,12 +74,12 @@ static void vga_init(device_t dev) pci_write_config32(dev, 0x10, 0xf4000008); pci_write_config32(dev, 0x14, 0xfb000000); - printk_debug("INSTALL REAL-MODE IDT\n"); + printk(BIOS_DEBUG, "INSTALL REAL-MODE IDT\n"); setup_realmode_idt(); - printk_debug("DO THE VGA BIOS\n"); + printk(BIOS_DEBUG, "DO THE VGA BIOS\n"); do_vgabios(); /* VGA seems to work without this, but crash & burn with it. */ - // printk_debug("Enable VGA console\n"); + // printk(BIOS_DEBUG, "Enable VGA console\n"); // vga_enable_console(); /* It's not clear if these need to be programmed before or after diff --git a/src/northbridge/via/cn700/vgabios.c b/src/northbridge/via/cn700/vgabios.c index 82a2bab481..1b3a9f06f8 100644 --- a/src/northbridge/via/cn700/vgabios.c +++ b/src/northbridge/via/cn700/vgabios.c @@ -349,17 +349,17 @@ void do_vgabios(void) dev = dev_find_class(PCI_CLASS_DISPLAY_VGA<<8 , 0); if (!dev) { - printk_debug("NO VGA FOUND\n"); + printk(BIOS_DEBUG, "NO VGA FOUND\n"); return; } - printk_debug("found VGA: vid=%x, did=%x\n", dev->vendor, dev->device); + printk(BIOS_DEBUG, "found VGA: vid=%x, did=%x\n", dev->vendor, dev->device); /* declare rom address here - keep any config data out of the way * of core LXB stuff */ rom = cbfs_load_optionrom(dev->vendor, dev->device, 0); pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1); - printk_debug("rom base, size: %x\n", rom); + printk(BIOS_DEBUG, "rom base, size: %x\n", rom); buf = (unsigned char *) rom; if ((buf[0] == 0x55) && (buf[1] == 0xaa)) { @@ -371,13 +371,13 @@ void do_vgabios(void) buf = (unsigned char *) 0xc0000; if (buf[0]==0x55 && buf[1]==0xAA) { busdevfn = (dev->bus->secondary << 8) | dev->path.pci.devfn; - printk_debug("bus/devfn = %#x\n", busdevfn); + printk(BIOS_DEBUG, "bus/devfn = %#x\n", busdevfn); real_mode_switch_call_vga(busdevfn); } else - printk_debug("Failed to copy VGA BIOS to 0xc0000\n"); + printk(BIOS_DEBUG, "Failed to copy VGA BIOS to 0xc0000\n"); } else - printk_debug("BAD SIGNATURE 0x%x 0x%x\n", buf[0], buf[1]); + printk(BIOS_DEBUG, "BAD SIGNATURE 0x%x 0x%x\n", buf[0], buf[1]); pci_write_config32(dev, PCI_ROM_ADDRESS, 0); } @@ -562,28 +562,28 @@ int biosint(unsigned long intnumber, cs = cs_ip >> 16; flags = stackflags; - printk_debug("biosint: INT# 0x%lx\n", intnumber); - printk_debug("biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n", + printk(BIOS_DEBUG, "biosint: INT# 0x%lx\n", intnumber); + printk(BIOS_DEBUG, "biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n", eax, ebx, ecx, edx); - printk_debug("biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n", + printk(BIOS_DEBUG, "biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n", ebp, esp, edi, esi); - printk_debug("biosint: ip 0x%x cs 0x%x flags 0x%x\n", + printk(BIOS_DEBUG, "biosint: ip 0x%x cs 0x%x flags 0x%x\n", ip, cs, flags); // cases in a good compiler are just as good as your own tables. switch (intnumber) { case 0 ... 15: // These are not BIOS service, but the CPU-generated exceptions - printk_info("biosint: Oops, exception %u\n", intnumber); + printk(BIOS_INFO, "biosint: Oops, exception %u\n", intnumber); if (esp < 0x1000) { - printk_debug("Stack contents: "); + printk(BIOS_DEBUG, "Stack contents: "); while (esp < 0x1000) { - printk_debug("0x%04x ", *(unsigned short *) esp); + printk(BIOS_DEBUG, "0x%04x ", *(unsigned short *) esp); esp += 2; } - printk_debug("\n"); + printk(BIOS_DEBUG, "\n"); } - printk_debug("biosint: Bailing out\n"); + printk(BIOS_DEBUG, "biosint: Bailing out\n"); // "longjmp" vga_exit(); break; @@ -602,7 +602,7 @@ int biosint(unsigned long intnumber, &ebx, &edx, &ecx, &eax, &flags); break; default: - printk_info("BIOSINT: Unsupport int #0x%x\n", + printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%x\n", intnumber); break; } @@ -728,7 +728,7 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, // devfn is an int, so we mask it off. busdevfn = (dev->bus->secondary << 8) | (dev->path.pci.devfn & 0xff); - printk_debug("0x%x: return 0x%x\n", func, busdevfn); + printk(BIOS_DEBUG, "0x%x: return 0x%x\n", func, busdevfn); *pebx = busdevfn; retval = 0; } else { @@ -754,7 +754,7 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, reg = *pedi; dev = dev_find_slot(bus, devfn); if (! dev) { - printk_debug("0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn); + printk(BIOS_DEBUG, "0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn); // idiots. the pcibios guys assumed you'd never pass a bad bus/devfn! *peax = PCIBIOS_BADREG; retval = -1; @@ -788,14 +788,14 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, if (retval) retval = PCIBIOS_BADREG; - printk_debug("0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n", + printk(BIOS_DEBUG, "0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n", func, bus, devfn, reg, *pecx); *peax = 0; retval = 0; } break; default: - printk_err("UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func); + printk(BIOS_ERR, "UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func); break; } diff --git a/src/northbridge/via/cx700/cx700_lpc.c b/src/northbridge/via/cx700/cx700_lpc.c index 943838720a..d6495aba61 100644 --- a/src/northbridge/via/cx700/cx700_lpc.c +++ b/src/northbridge/via/cx700/cx700_lpc.c @@ -56,7 +56,7 @@ static unsigned char *pin_to_irq(const unsigned char *pin) static void pci_routing_fixup(struct device *dev) { - printk_debug("%s: device is %p\n", __FUNCTION__, dev); + printk(BIOS_DEBUG, "%s: device is %p\n", __FUNCTION__, dev); /* set up PCI IRQ routing */ pci_write_config8(dev, 0x55, pci_irqs[0] << 4); @@ -64,17 +64,17 @@ static void pci_routing_fixup(struct device *dev) pci_write_config8(dev, 0x57, pci_irqs[3] << 4); /* Assigning IRQs */ - printk_debug("Setting up USB interrupts.\n"); + printk(BIOS_DEBUG, "Setting up USB interrupts.\n"); pci_assign_irqs(0, 0x10, pin_to_irq(usb_pins)); - printk_debug("Setting up VGA interrupts.\n"); + printk(BIOS_DEBUG, "Setting up VGA interrupts.\n"); pci_assign_irqs(1, 0x00, pin_to_irq(vga_pins)); - printk_debug("Setting up PCI slot interrupts.\n"); + printk(BIOS_DEBUG, "Setting up PCI slot interrupts.\n"); pci_assign_irqs(2, 0x04, pin_to_irq(slot_pins)); // more? - printk_debug("Setting up AC97 interrupts.\n"); + printk(BIOS_DEBUG, "Setting up AC97 interrupts.\n"); pci_assign_irqs(0x80, 0x1, pin_to_irq(ac97_pins)); } @@ -169,7 +169,7 @@ static void cx700_set_lpc_registers(struct device *dev) { unsigned char enables; - printk_debug("VIA CX700 LPC bridge init\n"); + printk(BIOS_DEBUG, "VIA CX700 LPC bridge init\n"); // enable the internal I/O decode enables = pci_read_config8(dev, 0x6C); diff --git a/src/northbridge/via/cx700/cx700_sata.c b/src/northbridge/via/cx700/cx700_sata.c index 893126606e..993b05ad0a 100644 --- a/src/northbridge/via/cx700/cx700_sata.c +++ b/src/northbridge/via/cx700/cx700_sata.c @@ -46,7 +46,7 @@ static void sata_init(struct device *dev) { u8 reg8; - printk_debug("Configuring VIA SATA & EIDE Controller\n"); + printk(BIOS_DEBUG, "Configuring VIA SATA & EIDE Controller\n"); /* Class IDE Disk, instead of RAID controller */ reg8 = pci_read_config8(dev, 0x45); @@ -57,7 +57,7 @@ static void sata_init(struct device *dev) pci_write_config8(dev, 0x45, reg8); #if defined(DISABLE_SATA) && (DISABLE_SATA == 1) - printk_info("Disabling SATA (Primary Channel)\n"); + printk(BIOS_INFO, "Disabling SATA (Primary Channel)\n"); /* Disable SATA channels */ pci_write_config8(dev, 0x40, 0x00); #else @@ -132,12 +132,12 @@ static void sata_init(struct device *dev) reg8 &= ~0xa0; pci_write_config8(dev, 0x42, reg8); reg8 = pci_read_config8(dev, 0x42); - printk_debug("Reg 0x42 read back as 0x%x\n", reg8); + printk(BIOS_DEBUG, "Reg 0x42 read back as 0x%x\n", reg8); /* Support Staggered Spin-Up */ reg8 = pci_read_config8(dev, 0xb9); if ((reg8 & 0x8) == 0) { - printk_debug("start OOB sequence on both drives\n"); + printk(BIOS_DEBUG, "start OOB sequence on both drives\n"); reg8 |= 0x30; pci_write_config8(dev, 0xb9, reg8); } diff --git a/src/northbridge/via/cx700/cx700_usb.c b/src/northbridge/via/cx700/cx700_usb.c index b2dc482df3..a85189477f 100644 --- a/src/northbridge/via/cx700/cx700_usb.c +++ b/src/northbridge/via/cx700/cx700_usb.c @@ -28,7 +28,7 @@ static void usb_init(struct device *dev) u8 reg8; /* USB Specification says the device must be Bus Master */ - printk_debug("UHCI: Setting up controller.. "); + printk(BIOS_DEBUG, "UHCI: Setting up controller.. "); reg32 = pci_read_config32(dev, PCI_COMMAND); pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER); @@ -37,7 +37,7 @@ static void usb_init(struct device *dev) reg8 |= (1 << 0); pci_write_config8(dev, 0xca, reg8); - printk_debug("done.\n"); + printk(BIOS_DEBUG, "done.\n"); } static struct device_operations usb_ops = { diff --git a/src/northbridge/via/cx700/cx700_vga.c b/src/northbridge/via/cx700/cx700_vga.c index bcb7d9e8a9..c259b376ad 100644 --- a/src/northbridge/via/cx700/cx700_vga.c +++ b/src/northbridge/via/cx700/cx700_vga.c @@ -49,7 +49,7 @@ void write_protect_vgabios(void) { device_t dev; - printk_debug("write_protect_vgabios\n"); + printk(BIOS_DEBUG, "write_protect_vgabios\n"); dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3324, 0); if (dev) @@ -64,7 +64,7 @@ static void vga_init(device_t dev) { u8 reg8; - printk_debug("Initializing VGA...\n"); + printk(BIOS_DEBUG, "Initializing VGA...\n"); //* pci_write_config8(dev, 0x04, 0x07); @@ -75,10 +75,10 @@ static void vga_init(device_t dev) pci_write_config8(dev, 0x3c, 0x0b); //*/ - printk_debug("Executing VGA option rom in real mode\n"); + printk(BIOS_DEBUG, "Executing VGA option rom in real mode\n"); setup_realmode_idt(); do_vgabios(); - printk_debug("Enable VGA console\n"); + printk(BIOS_DEBUG, "Enable VGA console\n"); vga_enable_console(); /* It's not clear if these need to be programmed before or after diff --git a/src/northbridge/via/cx700/northbridge.c b/src/northbridge/via/cx700/northbridge.c index b08dc17869..6a69d434fb 100644 --- a/src/northbridge/via/cx700/northbridge.c +++ b/src/northbridge/via/cx700/northbridge.c @@ -119,7 +119,7 @@ static void pci_domain_set_resources(device_t dev) #if CONFIG_WRITE_HIGH_TABLES == 1 high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024; high_tables_size = HIGH_TABLES_SIZE* 1024; - printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); + printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); #endif /* Report the memory regions */ diff --git a/src/northbridge/via/cx700/raminit.c b/src/northbridge/via/cx700/raminit.c index e0277f29bb..d28b8e37c4 100644 --- a/src/northbridge/via/cx700/raminit.c +++ b/src/northbridge/via/cx700/raminit.c @@ -26,7 +26,7 @@ /* Debugging macros. */ #if CONFIG_DEBUG_RAM_SETUP -#define PRINTK_DEBUG(x...) printk_debug(x) +#define PRINTK_DEBUG(x...) printk(BIOS_DEBUG, x) #else #define PRINTK_DEBUG(x...) #endif @@ -105,9 +105,9 @@ #define REGISTERPRESET(bus,dev,fun,bdfspec) \ { u8 i, reg; \ for (i=0; i<(sizeof((bdfspec))/sizeof(struct regmask)); i++) { \ - printk_debug("Writing bus " #bus " dev " #dev " fun " #fun " register "); \ - printk_debug("%02x", (bdfspec)[i].reg); \ - printk_debug("\n"); \ + printk(BIOS_DEBUG, "Writing bus " #bus " dev " #dev " fun " #fun " register "); \ + printk(BIOS_DEBUG, "%02x", (bdfspec)[i].reg); \ + printk(BIOS_DEBUG, "\n"); \ reg = pci_read_config8(PCI_DEV((bus), (dev), (fun)), (bdfspec)[i].reg); \ reg &= (bdfspec)[i].mask; \ reg |= (bdfspec)[i].val; \ @@ -184,7 +184,7 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl) regs = pci_read_config8(MEMCTRL, 0x6c); if (regs & (1 << 6)) - printk_debug("DDR2 Detected.\n"); + printk(BIOS_DEBUG, "DDR2 Detected.\n"); else die("ERROR: DDR1 memory detected but not supported by coreboot.\n"); @@ -201,25 +201,25 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl) /* SPD 9 SDRAM Cycle Time */ GET_SPD(dimm, spds, regs, 9); - printk_debug("\nDDRII "); + printk(BIOS_DEBUG, "\nDDRII "); if (spds <= 0x3d) { - printk_debug("533"); + printk(BIOS_DEBUG, "533"); val = DDRII_533; t = 38; } else if (spds <= 0x50) { - printk_debug("400"); + printk(BIOS_DEBUG, "400"); val = DDRII_400; t = 50; } else if (spds <= 0x60) { - printk_debug("333"); + printk(BIOS_DEBUG, "333"); val = DDRII_333; t = 60; } else if (spds <= 0x75) { - printk_debug("266"); + printk(BIOS_DEBUG, "266"); val = DDRII_266; t = 75; } else { - printk_debug("200"); + printk(BIOS_DEBUG, "200"); val = DDRII_200; t = 100; } @@ -259,45 +259,45 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl) /* SPD 9 18 23 25 CAS Latency NB3DRAM_REG62[2:0] */ /* Read SPD byte 18 CAS Latency */ GET_SPD(dimm, spds, regs, SPD_CAS_LAT); - printk_debug("\nCAS Supported "); + printk(BIOS_DEBUG, "\nCAS Supported "); if (spds & SPD_CAS_LAT_2) - printk_debug("2 "); + printk(BIOS_DEBUG, "2 "); if (spds & SPD_CAS_LAT_3) - printk_debug("3 "); + printk(BIOS_DEBUG, "3 "); if (spds & SPD_CAS_LAT_4) - printk_debug("4 "); + printk(BIOS_DEBUG, "4 "); if (spds & SPD_CAS_LAT_5) - printk_debug("5 "); + printk(BIOS_DEBUG, "5 "); if (spds & SPD_CAS_LAT_6) - printk_debug("6"); + printk(BIOS_DEBUG, "6"); /* We don't consider CAS = 6, because CX700 doesn't support it */ - printk_debug("\n CAS:"); + printk(BIOS_DEBUG, "\n CAS:"); if (spds & SPD_CAS_LAT_5) { - printk_debug("Starting at CL5"); + printk(BIOS_DEBUG, "Starting at CL5"); val = 0x3; /* See whether we can improve it */ GET_SPD(dimm, tmp, regs, SPD_CAS_LAT_MIN_X_1); if ((spds & SPD_CAS_LAT_4) && (tmp < 0x50)) { - printk_debug("\n... going to CL4"); + printk(BIOS_DEBUG, "\n... going to CL4"); val = 0x2; } GET_SPD(dimm, tmp, regs, SPD_CAS_LAT_MIN_X_2); if ((spds & SPD_CAS_LAT_3) && (tmp < 0x50)) { - printk_debug("\n... going to CL3"); + printk(BIOS_DEBUG, "\n... going to CL3"); val = 0x1; } } else { - printk_debug("Starting at CL4"); + printk(BIOS_DEBUG, "Starting at CL4"); val = 0x2; GET_SPD(dimm, tmp, regs, SPD_CAS_LAT_MIN_X_1); if ((spds & SPD_CAS_LAT_3) && (tmp < 0x50)) { - printk_debug("\n... going to CL3"); + printk(BIOS_DEBUG, "\n... going to CL3"); val = 0x1; } GET_SPD(dimm, tmp, regs, SPD_CAS_LAT_MIN_X_2); if ((spds & SPD_CAS_LAT_2) && (tmp < 0x50)) { - printk_debug("\n... going to CL2"); + printk(BIOS_DEBUG, "\n... going to CL2"); val = 0x0; } } @@ -308,7 +308,7 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl) /* SPD 27 Trp NB3DRAM_REG64[3:2] */ GET_SPD(dimm, spds, regs, SPD_TRP); - printk_debug("\nTrp %d", spds); + printk(BIOS_DEBUG, "\nTrp %d", spds); spds >>= 2; for (val = 2; val <= 5; val++) { if (spds <= (val * t / 10)) { @@ -324,7 +324,7 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl) /* SPD 29 Trcd NB3DRAM_REG64[7:6] */ GET_SPD(dimm, spds, regs, SPD_TRCD); - printk_debug("\nTrcd %d", spds); + printk(BIOS_DEBUG, "\nTrcd %d", spds); spds >>= 2; for (val = 2; val <= 5; val++) { if (spds <= (val * t / 10)) { @@ -340,7 +340,7 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl) /* SPD 30 Tras NB3DRAM_REG62[7:4] */ GET_SPD(dimm, spds, regs, SPD_TRAS); - printk_debug("\nTras %d", spds); + printk(BIOS_DEBUG, "\nTras %d", spds); for (val = 5; val <= 20; val++) { if (spds <= (val * t / 10)) { val = val - 5; @@ -355,7 +355,7 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl) /* SPD 42 SPD 40 Trfc NB3DRAM_REG61[5:0] */ GET_SPD(dimm, spds, regs, SPD_TRFC); - printk_debug("\nTrfc %d", spds); + printk(BIOS_DEBUG, "\nTrfc %d", spds); tmp = spds; GET_SPD(dimm, spds, regs, SPD_EX_TRC_TRFC); if (spds & 0x1) @@ -382,7 +382,7 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl) } } val <<= 6; - printk_debug("\nTrrd val = 0x%x", val); + printk(BIOS_DEBUG, "\nTrrd val = 0x%x", val); regs = pci_read_config8(MEMCTRL, 0x63); regs &= ~0xc0; regs |= val; @@ -397,7 +397,7 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl) } } val <<= 6; - printk_debug("\nTwr val = 0x%x", val); + printk(BIOS_DEBUG, "\nTwr val = 0x%x", val); regs = pci_read_config8(MEMCTRL, 0x61); regs &= ~0xc0; @@ -407,13 +407,13 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl) /* SPD 37 Twtr NB3DRAM_REG63[1] */ GET_SPD(dimm, spds, regs, SPD_TWTR); spds >>= 2; - printk_debug("\nTwtr 0x%x", spds); + printk(BIOS_DEBUG, "\nTwtr 0x%x", spds); if (spds <= (t * 2 / 10)) val = 0; else val = 1; val <<= 1; - printk_debug("\nTwtr val = 0x%x", val); + printk(BIOS_DEBUG, "\nTwtr val = 0x%x", val); regs = pci_read_config8(MEMCTRL, 0x63); regs &= ~0x2; @@ -423,13 +423,13 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl) /* SPD 38 Trtp NB3DRAM_REG63[3] */ GET_SPD(dimm, spds, regs, SPD_TRTP); spds >>= 2; - printk_debug("\nTrtp 0x%x", spds); + printk(BIOS_DEBUG, "\nTrtp 0x%x", spds); if (spds <= (t * 2 / 10)) val = 0; else val = 1; val <<= 3; - printk_debug("\nTrtp val = 0x%x", val); + printk(BIOS_DEBUG, "\nTrtp val = 0x%x", val); regs = pci_read_config8(MEMCTRL, 0x63); regs &= ~0x8; @@ -534,7 +534,7 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl) val += spds; } } - printk_debug("\nchip #%d", val); + printk(BIOS_DEBUG, "\nchip #%d", val); if (val > 18) regs = 0xdb; else @@ -852,7 +852,7 @@ static void step_2_19(const struct mem_controller *ctrl) i |= DDR2_Twr_table[val]; read32(i); - printk_debug("MRS = %08x\n", i); + printk(BIOS_DEBUG, "MRS = %08x\n", i); udelay(15); @@ -1073,7 +1073,7 @@ static void sdram_enable(const struct mem_controller *ctrl) else sdram_clear_vr_addr(ctrl, i); } - printk_debug("\nDQSI Low %08x", dl); + printk(BIOS_DEBUG, "\nDQSI Low %08x", dl); for (dh = dl; dh < 0x3f; dh += 2) { reg8 = dh & 0x3f; reg8 |= 0x80; /* Set Manual Mode */ @@ -1106,7 +1106,7 @@ static void sdram_enable(const struct mem_controller *ctrl) break; } } - printk_debug("\nDQSI High %02x", dh); + printk(BIOS_DEBUG, "\nDQSI High %02x", dh); pci_write_config8(PCI_DEV(0, 0, 4), SCRATCH_CHA_DQSI_LOW_REG, dl); pci_write_config8(PCI_DEV(0, 0, 4), SCRATCH_CHA_DQSI_HIGH_REG, dh); reg8 = pci_read_config8(MEMCTRL, 0X90) & 0X7; diff --git a/src/northbridge/via/cx700/vgabios.c b/src/northbridge/via/cx700/vgabios.c index 042d99e831..72b841f6f8 100644 --- a/src/northbridge/via/cx700/vgabios.c +++ b/src/northbridge/via/cx700/vgabios.c @@ -315,10 +315,10 @@ void do_vgabios(void) dev = dev_find_class(PCI_CLASS_DISPLAY_VGA << 8, 0); if (!dev) { - printk_debug("NO VGA FOUND\n"); + printk(BIOS_DEBUG, "NO VGA FOUND\n"); return; } - printk_debug("found VGA: vid=%x, did=%x\n", dev->vendor, dev->device); + printk(BIOS_DEBUG, "found VGA: vid=%x, did=%x\n", dev->vendor, dev->device); /* declare rom address here - keep any config data out of the way * of core LXB stuff */ @@ -326,7 +326,7 @@ void do_vgabios(void) #warning ROM address hardcoded to 512K rom = (unsigned int)cbfs_load_optionrom(dev->vendor, dev->device, 0); pci_write_config32(dev, PCI_ROM_ADDRESS, rom | 1); - printk_debug("rom base, size: %x\n", rom); + printk(BIOS_DEBUG, "rom base, size: %x\n", rom); buf = (unsigned char *)rom; if ((buf[0] == 0x55) && (buf[1] == 0xaa)) { @@ -339,13 +339,13 @@ void do_vgabios(void) if (buf[0] == 0x55 && buf[1] == 0xAA) { busdevfn = (dev->bus->secondary << 8) | dev->path.pci.devfn; - printk_debug("bus/devfn = %#x\n", busdevfn); + printk(BIOS_DEBUG, "bus/devfn = %#x\n", busdevfn); real_mode_switch_call_vga(busdevfn); } else - printk_debug("Failed to copy VGA BIOS to 0xc0000\n"); + printk(BIOS_DEBUG, "Failed to copy VGA BIOS to 0xc0000\n"); } else - printk_debug("BAD SIGNATURE 0x%x 0x%x\n", buf[0], buf[1]); + printk(BIOS_DEBUG, "BAD SIGNATURE 0x%x 0x%x\n", buf[0], buf[1]); pci_write_config32(dev, PCI_ROM_ADDRESS, 0); } @@ -512,28 +512,28 @@ int biosint(unsigned long intnumber, cs = cs_ip >> 16; flags = stackflags; - printk_debug("biosint: INT# 0x%lx\n", intnumber); - printk_debug("biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n", + printk(BIOS_DEBUG, "biosint: INT# 0x%lx\n", intnumber); + printk(BIOS_DEBUG, "biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n", eax, ebx, ecx, edx); - printk_debug("biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n", + printk(BIOS_DEBUG, "biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n", ebp, esp, edi, esi); - printk_debug("biosint: ip 0x%x cs 0x%x flags 0x%x\n", + printk(BIOS_DEBUG, "biosint: ip 0x%x cs 0x%x flags 0x%x\n", ip, cs, flags); // cases in a good compiler are just as good as your own tables. switch (intnumber) { case 0 ... 15: // These are not BIOS service, but the CPU-generated exceptions - printk_info("biosint: Oops, exception %u\n", intnumber); + printk(BIOS_INFO, "biosint: Oops, exception %u\n", intnumber); if (esp < 0x1000) { - printk_debug("Stack contents: "); + printk(BIOS_DEBUG, "Stack contents: "); while (esp < 0x1000) { - printk_debug("0x%04x ", *(unsigned short *)esp); + printk(BIOS_DEBUG, "0x%04x ", *(unsigned short *)esp); esp += 2; } - printk_debug("\n"); + printk(BIOS_DEBUG, "\n"); } - printk_debug("biosint: Bailing out\n"); + printk(BIOS_DEBUG, "biosint: Bailing out\n"); // "longjmp" vga_exit(); break; @@ -552,7 +552,7 @@ int biosint(unsigned long intnumber, &ebx, &edx, &ecx, &eax, &flags); break; default: - printk_info("BIOSINT: Unsupport int #0x%x\n", intnumber); + printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%x\n", intnumber); break; } if (ret) @@ -669,7 +669,7 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, // devfn is an int, so we mask it off. busdevfn = (dev->bus->secondary << 8) | (dev->path.pci.devfn & 0xff); - printk_debug("0x%x: return 0x%x\n", func, + printk(BIOS_DEBUG, "0x%x: return 0x%x\n", func, busdevfn); *pebx = busdevfn; retval = 0; @@ -696,8 +696,7 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, reg = *pedi; dev = dev_find_slot(bus, devfn); if (!dev) { - printk_debug - ("0x%x: BAD DEVICE bus %d devfn 0x%x\n", + printk(BIOS_DEBUG, "0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn); // idiots. the pcibios guys assumed you'd never pass a bad bus/devfn! *peax = PCIBIOS_BADREG; @@ -732,15 +731,14 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, if (retval) retval = PCIBIOS_BADREG; - printk_debug - ("0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n", + printk(BIOS_DEBUG, "0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n", func, bus, devfn, reg, *pecx); *peax = 0; retval = 0; } break; default: - printk_err("UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func); + printk(BIOS_ERR, "UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func); break; } diff --git a/src/northbridge/via/vt8601/northbridge.c b/src/northbridge/via/vt8601/northbridge.c index d56456e00e..5af7836a93 100644 --- a/src/northbridge/via/vt8601/northbridge.c +++ b/src/northbridge/via/vt8601/northbridge.c @@ -20,7 +20,7 @@ */ static void northbridge_init(device_t dev) { - printk_spew("VT8601 random fixup ...\n"); + printk(BIOS_SPEW, "VT8601 random fixup ...\n"); pci_write_config8(dev, 0x70, 0xc0); pci_write_config8(dev, 0x71, 0x88); pci_write_config8(dev, 0x72, 0xec); @@ -117,10 +117,10 @@ static void pci_domain_set_resources(device_t dev) if (reg > rambits) rambits = reg; if (reg < rambits) - printk_err("ERROR! register 0x%x is not set!\n", + printk(BIOS_ERR, "ERROR! register 0x%x is not set!\n", ramregs[i]); } - printk_debug("I would set ram size to 0x%x Kbytes\n", (rambits)*8*1024); + printk(BIOS_DEBUG, "I would set ram size to 0x%x Kbytes\n", (rambits)*8*1024); tomk = rambits*8*1024; /* Compute the top of Low memory */ tolmk = pci_tolm >> 10; @@ -133,7 +133,7 @@ static void pci_domain_set_resources(device_t dev) #if CONFIG_WRITE_HIGH_TABLES == 1 high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024; high_tables_size = HIGH_TABLES_SIZE* 1024; - printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); + printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); #endif /* Report the memory regions */ diff --git a/src/northbridge/via/vt8623/northbridge.c b/src/northbridge/via/vt8623/northbridge.c index 15910fe74d..fd1c76e5ac 100644 --- a/src/northbridge/via/vt8623/northbridge.c +++ b/src/northbridge/via/vt8623/northbridge.c @@ -27,7 +27,7 @@ static void northbridge_init(device_t dev) unsigned long fb; unsigned char c; - printk_debug("VT8623 random fixup ...\n"); + printk(BIOS_DEBUG, "VT8623 random fixup ...\n"); pci_write_config8(dev, 0x0d, 0x08); pci_write_config8(dev, 0x70, 0x82); pci_write_config8(dev, 0x71, 0xc8); @@ -48,7 +48,7 @@ static void northbridge_init(device_t dev) */ //fb = pci_read_config32(dev, 0x10); /* Base addres of framebuffer */ fb = 0xd0000000; - printk_debug("Frame buffer at %8x\n",fb); + printk(BIOS_DEBUG, "Frame buffer at %8x\n",fb); c = pci_read_config8(dev, 0xe1) & 0xf0; /* size of vga */ c |= fb>>28; /* upper nibble of frame buffer address */ @@ -77,7 +77,7 @@ static const struct pci_driver northbridge_driver __pci_driver = { static void agp_init(device_t dev) { - printk_debug("VT8623 AGP random fixup ...\n"); + printk(BIOS_DEBUG, "VT8623 AGP random fixup ...\n"); pci_write_config8(dev, 0x3e, 0x0c); pci_write_config8(dev, 0x40, 0x83); @@ -107,7 +107,7 @@ static void vga_init(device_t dev) // unsigned long fb; msr_t clocks1,clocks2,instructions,setup; - printk_debug("VGA random fixup ...\n"); + printk(BIOS_DEBUG, "VGA random fixup ...\n"); pci_write_config8(dev, 0x04, 0x07); pci_write_config8(dev, 0x0d, 0x20); pci_write_config32(dev,0x10,0xd8000008); @@ -131,24 +131,24 @@ static void vga_init(device_t dev) //clocks2 = rdmsr(0x10); //instructions = rdmsr(0xc2); - printk_debug("Clocks 1 = %08x:%08x\n",clocks1.hi,clocks1.lo); - printk_debug("Clocks 2 = %08x:%08x\n",clocks2.hi,clocks2.lo); - printk_debug("Instructions = %08x:%08x\n",instructions.hi,instructions.lo); + printk(BIOS_DEBUG, "Clocks 1 = %08x:%08x\n",clocks1.hi,clocks1.lo); + printk(BIOS_DEBUG, "Clocks 2 = %08x:%08x\n",clocks2.hi,clocks2.lo); + printk(BIOS_DEBUG, "Instructions = %08x:%08x\n",instructions.hi,instructions.lo); #else /* code to make vga init run in real mode - does work but against the current coreboot philosophy */ - printk_debug("INSTALL REAL-MODE IDT\n"); + printk(BIOS_DEBUG, "INSTALL REAL-MODE IDT\n"); setup_realmode_idt(); - printk_debug("DO THE VGA BIOS\n"); + printk(BIOS_DEBUG, "DO THE VGA BIOS\n"); do_vgabios(); //clocks2 = rdmsr(0x10); //instructions = rdmsr(0xc2); - //printk_debug("Clocks 1 = %08x:%08x\n",clocks1.hi,clocks1.lo); - //printk_debug("Clocks 2 = %08x:%08x\n",clocks2.hi,clocks2.lo); - //printk_debug("Instructions = %08x:%08x\n",instructions.hi,instructions.lo); + //printk(BIOS_DEBUG, "Clocks 1 = %08x:%08x\n",clocks1.hi,clocks1.lo); + //printk(BIOS_DEBUG, "Clocks 2 = %08x:%08x\n",clocks2.hi,clocks2.lo); + //printk(BIOS_DEBUG, "Instructions = %08x:%08x\n",instructions.hi,instructions.lo); vga_enable_console(); @@ -229,7 +229,7 @@ static void pci_domain_set_resources(device_t dev) device_t mc_dev; uint32_t pci_tolm; - printk_spew("Entering vt8623 pci_domain_set_resources.\n"); + printk(BIOS_SPEW, "Entering vt8623 pci_domain_set_resources.\n"); pci_tolm = find_pci_tolm(&dev->link[0]); mc_dev = dev->link[0].children; @@ -250,10 +250,10 @@ static void pci_domain_set_resources(device_t dev) if (reg > rambits) rambits = reg; if (reg < rambits) - printk_err("ERROR! register 0x%x is not set!\n", + printk(BIOS_ERR, "ERROR! register 0x%x is not set!\n", ramregs[i]); } - printk_debug("I would set ram size to 0x%x Kbytes\n", (rambits)*16*1024); + printk(BIOS_DEBUG, "I would set ram size to 0x%x Kbytes\n", (rambits)*16*1024); tomk = rambits*16*1024 - 32768; /* Compute the top of Low memory */ tolmk = pci_tolm >> 10; @@ -266,7 +266,7 @@ static void pci_domain_set_resources(device_t dev) #if CONFIG_WRITE_HIGH_TABLES == 1 high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024; high_tables_size = HIGH_TABLES_SIZE* 1024; - printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); + printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); #endif /* Report the memory regions */ @@ -304,7 +304,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { - printk_spew("In vt8623 enable_dev for device %s.\n", dev_path(dev)); + printk(BIOS_SPEW, "In vt8623 enable_dev for device %s.\n", dev_path(dev)); /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { diff --git a/src/northbridge/via/vx800/examples/chipset_init.c b/src/northbridge/via/vx800/examples/chipset_init.c index c04da9cbc8..08d3c95048 100644 --- a/src/northbridge/via/vx800/examples/chipset_init.c +++ b/src/northbridge/via/vx800/examples/chipset_init.c @@ -261,7 +261,7 @@ void AcpiInit(void) // Get SB Revision sbchiprev = pci_rawread_config8(rawdevice, 0xf6); - printk_debug("SB chip revision =%x\n", sbchiprev); + printk(BIOS_DEBUG, "SB chip revision =%x\n", sbchiprev); // Fill Register Table via_pci_inittable(sbchiprev, mSbStage1InitTbl); @@ -279,7 +279,7 @@ void Stage2NbInit(void) u32 subid = 0; rawdevice = PCI_RAWDEV(0, 0, 4); nbchiprev = pci_rawread_config8(rawdevice, 0xf6); - printk_debug("NB chip revision =%x\n", nbchiprev); + printk(BIOS_DEBUG, "NB chip revision =%x\n", nbchiprev); via_pci_inittable(nbchiprev, mNbStage2InitTable); @@ -414,7 +414,7 @@ void InitEHCI(u8 Number, u8 bEnable) // Get Chipset Revision EHCIRevision = pci_rawread_config8(PCI_RAWDEV(0, 0x10, 4), 0xF6); - printk_debug("EHCI Revision =%x\n", EHCIRevision); + printk(BIOS_DEBUG, "EHCI Revision =%x\n", EHCIRevision); via_pci_inittable(EHCIRevision, mEHCIInitTable); } } @@ -567,7 +567,7 @@ void Stage2SbInit(void) rawdevice = PCI_RAWDEV(0, 11, 0); sbchiprev = pci_rawread_config8(rawdevice, 0xf6); - printk_debug("SB chip revision =%x\n", sbchiprev); + printk(BIOS_DEBUG, "SB chip revision =%x\n", sbchiprev); //SBBasicInit via_pci_inittable(sbchiprev, mBusControllerInitTable); @@ -592,7 +592,7 @@ void Stage2SbInit(void) void init_VIA_chipset(void) { - printk_debug("In: init_VIA_chipset\n"); + printk(BIOS_DEBUG, "In: init_VIA_chipset\n"); //1.nbstage1 is done in raminit. //2.sbstage1 AcpiInit(); @@ -604,7 +604,7 @@ void init_VIA_chipset(void) //5.open hdac pci_rawmodify_config32(PCI_RAWDEV(0, 0x11, 7), 0xd1, 0, 0x04); - printk_debug("End: init_VIA_chipset\n"); + printk(BIOS_DEBUG, "End: init_VIA_chipset\n"); } /** @@ -630,7 +630,7 @@ void hardwaremain(int boot_complete) u8 y, x; init_VIA_chipset(); - printk_emerg("file '%s', line %d\n\n", __FILE__, __LINE__); + printk(BIOS_EMERG, "file '%s', line %d\n\n", __FILE__, __LINE__); #if 0 @@ -653,90 +653,90 @@ void hardwaremain(int boot_complete) //pci_rawmodify_config8(PCI_RAWDEV(0, 0x11, 0), 0x50, 0x00, 0x76);//open all usb and usb mode //pci_rawmodify_config8(PCI_RAWDEV(0, 0x11, 0), 0x50, 0x76, 0x76);//close all usb - printk_info("=================SB 50h=%02x \n", + printk(BIOS_INFO, "=================SB 50h=%02x \n", pci_rawread_config8(PCI_RAWDEV(0, 0x11, 0), 0x50)); /* FIXME: Is there a better way to handle this? */ init_timer(); - printk_emerg("file '%s', line %d\n\n", __FILE__, __LINE__); + printk(BIOS_EMERG, "file '%s', line %d\n\n", __FILE__, __LINE__); /* Find the devices we don't have hard coded knowledge about. */ dev_enumerate(); - printk_emerg("file '%s', line %d\n\n", __FILE__, __LINE__); + printk(BIOS_EMERG, "file '%s', line %d\n\n", __FILE__, __LINE__); #if 0 x = y = 0; - printk_info("dump ehci3 \n"); + printk(BIOS_INFO, "dump ehci3 \n"); for (; x < 16; x++) { y = 0; for (; y < 16; y++) { - printk_info("%02x ", + printk(BIOS_INFO, "%02x ", pci_rawread_config8(PCI_RAWDEV (0, 0x10, 4), x * 16 + y)); } - printk_info("\n"); + printk(BIOS_INFO, "\n"); } #endif post_code(0x66); /* Now compute and assign the bus resources. */ dev_configure(); - printk_emerg("file '%s', line %d\n\n", __FILE__, __LINE__); + printk(BIOS_EMERG, "file '%s', line %d\n\n", __FILE__, __LINE__); #if 0 x = y = 0; - printk_info("dump ehci3 \n"); + printk(BIOS_INFO, "dump ehci3 \n"); for (; x < 16; x++) { y = 0; for (; y < 16; y++) { - printk_info("%02x ", + printk(BIOS_INFO, "%02x ", pci_rawread_config8(PCI_RAWDEV (0, 0x10, 4), x * 16 + y)); } - printk_info("\n"); + printk(BIOS_INFO, "\n"); } #endif post_code(0x88); /* Now actually enable devices on the bus */ dev_enable(); - printk_emerg("file '%s', line %d\n\n", __FILE__, __LINE__); + printk(BIOS_EMERG, "file '%s', line %d\n\n", __FILE__, __LINE__); /* And of course initialize devices on the bus */ #if 0 x = y = 0; - printk_info("dump ehci3 \n"); + printk(BIOS_INFO, "dump ehci3 \n"); for (; x < 16; x++) { y = 0; for (; y < 16; y++) { - printk_info("%02x ", + printk(BIOS_INFO, "%02x ", pci_rawread_config8(PCI_RAWDEV (0, 0x10, 4), x * 16 + y)); } - printk_info("\n"); + printk(BIOS_INFO, "\n"); } #endif dev_initialize(); post_code(0x89); - printk_emerg("file '%s', line %d\n\n", __FILE__, __LINE__); + printk(BIOS_EMERG, "file '%s', line %d\n\n", __FILE__, __LINE__); // pci_rawwrite_config16(PCI_RAWDEV(0, 0xf, 0), 0xBA, 0x0571); #if 0 x = y = 0; - printk_info("dump ehci3 \n"); + printk(BIOS_INFO, "dump ehci3 \n"); for (; x < 16; x++) { y = 0; for (; y < 16; y++) { - printk_info("%02x ", + printk(BIOS_INFO, "%02x ", pci_rawread_config8(PCI_RAWDEV (0, 0x10, 4), x * 16 + y)); } - printk_info("\n"); + printk(BIOS_INFO, "\n"); } #endif @@ -1265,25 +1265,25 @@ for(i=0;i<5;i++){ #if 1 struct device *dev; - printk_info("=========zjldump all devices...\n"); + printk(BIOS_INFO, "=========zjldump all devices...\n"); for (dev = all_devices; dev; dev = dev->next) { if (dev->path.type == DEVICE_PATH_PCI) { - printk_debug("%s dump\n", dev_path(dev)); + printk(BIOS_DEBUG, "%s dump\n", dev_path(dev)); x = y = 0; for (; x < 16; x++) { y = 0; for (; y < 16; y++) { - printk_info("%02x ", + printk(BIOS_INFO, "%02x ", pci_read_config8(dev, x * 16 + y)); } - printk_info("\n"); + printk(BIOS_INFO, "\n"); } } - printk_info("\n"); + printk(BIOS_INFO, "\n"); } #endif diff --git a/src/northbridge/via/vx800/examples/romstage.c b/src/northbridge/via/vx800/examples/romstage.c index c1de3f3dc2..c7efb51791 100644 --- a/src/northbridge/via/vx800/examples/romstage.c +++ b/src/northbridge/via/vx800/examples/romstage.c @@ -574,7 +574,7 @@ So, I use: #include "cpu/via/car/cache_as_ram_post.c". my via-version post.c hav __asm__ volatile ("movl %%esp, %0\n\t":"=a" (v_esp) ); #if CONFIG_USE_INIT - printk_debug("v_esp=%08x\r\n", v_esp); + printk(BIOS_DEBUG, "v_esp=%08x\r\n", v_esp); #else print_debug("v_esp="); print_debug_hex32(v_esp); @@ -590,7 +590,7 @@ So, I use: #include "cpu/via/car/cache_as_ram_post.c". my via-version post.c hav //stack cpu_reset = 0; #if CONFIG_USE_INIT - printk_debug("cpu_reset = %08x\r\n", cpu_reset); + printk(BIOS_DEBUG, "cpu_reset = %08x\r\n", cpu_reset); #else print_debug("cpu_reset = "); print_debug_hex32(cpu_reset); @@ -642,7 +642,7 @@ So, I use: #include "cpu/via/car/cache_as_ram_post.c". my via-version post.c hav print_debug("Use Ram as Stack now - \r\n"); } #if CONFIG_USE_INIT - printk_debug("new_cpu_reset = %08x\r\n", new_cpu_reset); + printk(BIOS_DEBUG, "new_cpu_reset = %08x\r\n", new_cpu_reset); #else print_debug("new_cpu_reset = "); print_debug_hex32(new_cpu_reset); diff --git a/src/northbridge/via/vx800/northbridge.c b/src/northbridge/via/vx800/northbridge.c index d1f60635bb..9ec54da399 100644 --- a/src/northbridge/via/vx800/northbridge.c +++ b/src/northbridge/via/vx800/northbridge.c @@ -126,7 +126,7 @@ static void pci_domain_set_resources(device_t dev) u32 pci_tolm; u8 reg; - printk_spew("Entering vx800 pci_domain_set_resources.\n"); + printk(BIOS_SPEW, "Entering vx800 pci_domain_set_resources.\n"); pci_tolm = find_pci_tolm(&dev->link[0]); mc_dev = dev_find_device(PCI_VENDOR_ID_VIA, @@ -162,7 +162,7 @@ if register with invalid value we set frame buffer size to 32M for default, but (((rambits << 6) - (4 << reg) - VIACONFIG_TOP_SM_SIZE_MB) * 1024); - printk_spew("tomk is 0x%x\n", tomk); + printk(BIOS_SPEW, "tomk is 0x%x\n", tomk); /* Compute the Top Of Low Memory, in Kb */ tolmk = pci_tolm >> 10; if (tolmk >= tomk) { @@ -206,7 +206,7 @@ static const struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { - printk_spew("In VX800 enable_dev for device %s.\n", dev_path(dev)); + printk(BIOS_SPEW, "In VX800 enable_dev for device %s.\n", dev_path(dev)); /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { diff --git a/src/northbridge/via/vx800/vga.c b/src/northbridge/via/vx800/vga.c index 732963de46..58d70c33c3 100644 --- a/src/northbridge/via/vx800/vga.c +++ b/src/northbridge/via/vx800/vga.c @@ -53,7 +53,7 @@ void write_protect_vgabios(void) { device_t dev; - printk_info("write_protect_vgabios\n"); + printk(BIOS_INFO, "write_protect_vgabios\n"); /* there are two possible devices. Just do both. */ dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VX855_MEMCTRL, 0); @@ -85,16 +85,16 @@ static void vga_init(device_t dev) pci_write_config32(dev, 0x14, VIACONFIG_VGA_PCI_14); pci_write_config8(dev, 0x3c, 0x0a); //same with vx855_lpc.c //*/ - printk_emerg("file '%s', line %d\n\n", __FILE__, __LINE__); + printk(BIOS_EMERG, "file '%s', line %d\n\n", __FILE__, __LINE__); #if 1 - printk_debug("INSTALL REAL-MODE IDT\n"); + printk(BIOS_DEBUG, "INSTALL REAL-MODE IDT\n"); setup_realmode_idt(); - printk_debug("DO THE VGA BIOS\n"); + printk(BIOS_DEBUG, "DO THE VGA BIOS\n"); do_vgabios(); if ((acpi_sleep_type == 3)/* || (PAYLOAD_IS_SEABIOS == 0)*/) { - printk_debug("Enable VGA console\n"); + printk(BIOS_DEBUG, "Enable VGA console\n"); // remove this function since in cn700 it is said "VGA seems to work without this, but crash & burn with it" //but the existense of vga_enable_console() seems do not hurt my coreboot. XP+ubuntu s3 can resume with and without this function. //and remove it also do not help my s3 problem: desktop screen have some thin black line, after resuming back to win. @@ -102,7 +102,7 @@ static void vga_init(device_t dev) } #else /* Attempt to manually force the rom to load */ - printk_debug("Forcing rom load\r\n"); + printk(BIOS_DEBUG, "Forcing rom load\r\n"); pci_rom_load(dev, 0xfff80000); run_bios(dev, 0xc0000); #endif @@ -122,7 +122,7 @@ static void vga_init(device_t dev) outb(0x39, SR_INDEX); outb(reg8, SR_DATA); */ } - printk_emerg("file '%s', line %d\n\n", __FILE__, __LINE__); + printk(BIOS_EMERG, "file '%s', line %d\n\n", __FILE__, __LINE__); } diff --git a/src/northbridge/via/vx800/vgabios.c b/src/northbridge/via/vx800/vgabios.c index b536b5825d..2a99b9c4c7 100644 --- a/src/northbridge/via/vx800/vgabios.c +++ b/src/northbridge/via/vx800/vgabios.c @@ -302,7 +302,7 @@ void do_vgabios(void) u16 tmp; u8 tmp8; - printk_emerg("file '%s', line %d\n\n", __FILE__, __LINE__); + printk(BIOS_EMERG, "file '%s', line %d\n\n", __FILE__, __LINE__); /* clear vga bios data area */ for (i = 0x400; i < 0x500; i++) { @@ -312,24 +312,24 @@ void do_vgabios(void) dev = dev_find_class(PCI_CLASS_DISPLAY_VGA << 8, 0); if (!dev) { - printk_debug("NO VGA FOUND\n"); + printk(BIOS_DEBUG, "NO VGA FOUND\n"); return; } - printk_debug("found VGA: vid=%x, did=%x\n", dev->vendor, dev->device); + printk(BIOS_DEBUG, "found VGA: vid=%x, did=%x\n", dev->vendor, dev->device); /* declare rom address here - keep any config data out of the way * of core LXB stuff */ rom = cbfs_load_optionrom(dev->vendor, dev->device, 0); pci_write_config32(dev, PCI_ROM_ADDRESS, rom | 1); - printk_debug("rom base: %x\n", rom); + printk(BIOS_DEBUG, "rom base: %x\n", rom); buf = (unsigned char *)rom; - printk_emerg("file '%s', line %d\n\n", __FILE__, __LINE__); + printk(BIOS_EMERG, "file '%s', line %d\n\n", __FILE__, __LINE__); if ((buf[0] == 0x55) && (buf[1] == 0xaa)) { memcpy((void *)0xc0000, buf, size); - printk_emerg("file '%s', line %d\n\n", __FILE__, __LINE__); + printk(BIOS_EMERG, "file '%s', line %d\n\n", __FILE__, __LINE__); write_protect_vgabios(); // in northbridge @@ -338,14 +338,14 @@ void do_vgabios(void) if (buf[0] == 0x55 && buf[1] == 0xAA) { busdevfn = (dev->bus->secondary << 8) | dev->path.pci.devfn; - printk_debug("bus/devfn = %#x\n", busdevfn); + printk(BIOS_DEBUG, "bus/devfn = %#x\n", busdevfn); real_mode_switch_call_vga(busdevfn); } else - printk_debug("Failed to copy VGA BIOS to 0xc0000\n"); + printk(BIOS_DEBUG, "Failed to copy VGA BIOS to 0xc0000\n"); } else - printk_debug("BAD SIGNATURE 0x%x 0x%x\n", buf[0], buf[1]); + printk(BIOS_DEBUG, "BAD SIGNATURE 0x%x 0x%x\n", buf[0], buf[1]); - printk_emerg("file '%s', line %d\n\n", __FILE__, __LINE__); + printk(BIOS_EMERG, "file '%s', line %d\n\n", __FILE__, __LINE__); pci_write_config32(dev, PCI_ROM_ADDRESS, 0); } @@ -513,12 +513,12 @@ int biosint(unsigned long intnumber, cs = cs_ip >> 16; flags = stackflags; - printk_debug("biosint: INT# 0x%lx\n", intnumber); - printk_debug("biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n", + printk(BIOS_DEBUG, "biosint: INT# 0x%lx\n", intnumber); + printk(BIOS_DEBUG, "biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n", eax, ebx, ecx, edx); - printk_debug("biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n", + printk(BIOS_DEBUG, "biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n", ebp, esp, edi, esi); - printk_debug("biosint: ip 0x%x cs 0x%x flags 0x%x\n", + printk(BIOS_DEBUG, "biosint: ip 0x%x cs 0x%x flags 0x%x\n", ip, cs, flags); // cases in a good compiler are just as good as your own tables. @@ -527,16 +527,16 @@ int biosint(unsigned long intnumber, case 6: case 7: case 8: case 9: case 10: case 11: case 12: case 13: case 14: case 15: // These are not BIOS service, but the CPU-generated exceptions - printk_info("biosint: Oops, exception %u\n", intnumber); + printk(BIOS_INFO, "biosint: Oops, exception %u\n", intnumber); if (esp < 0x1000) { - printk_debug("Stack contents: "); + printk(BIOS_DEBUG, "Stack contents: "); while (esp < 0x1000) { - printk_debug("0x%04x ", *(unsigned short *)esp); + printk(BIOS_DEBUG, "0x%04x ", *(unsigned short *)esp); esp += 2; } - printk_debug("\n"); + printk(BIOS_DEBUG, "\n"); } - printk_debug("biosint: Bailing out\n"); + printk(BIOS_DEBUG, "biosint: Bailing out\n"); // "longjmp" if ((acpi_sleep_type == 3)/* || (PAYLOAD_IS_SEABIOS == 0)*/) // add this to keep same with kevin's seabios patch in 2008-9-8 vga_exit(); @@ -556,7 +556,7 @@ int biosint(unsigned long intnumber, &ebx, &edx, &ecx, &eax, &flags); break; default: - printk_info("BIOSINT: Unsupport int #0x%x\n", intnumber); + printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%x\n", intnumber); break; } if (ret) @@ -686,7 +686,7 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, // devfn is an int, so we mask it off. busdevfn = (dev->bus->secondary << 8) | (dev->path.pci.devfn & 0xff); - printk_debug("0x%x: return 0x%x\n", func, + printk(BIOS_DEBUG, "0x%x: return 0x%x\n", func, busdevfn); *pebx = busdevfn; retval = 0; @@ -713,8 +713,7 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, reg = *pedi; dev = dev_find_slot(bus, devfn); if (!dev) { - printk_debug - ("0x%x: BAD DEVICE bus %d devfn 0x%x\n", + printk(BIOS_DEBUG, "0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn); // idiots. the pcibios guys assumed you'd never pass a bad bus/devfn! *peax = PCIBIOS_BADREG; @@ -749,15 +748,14 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, if (retval) retval = PCIBIOS_BADREG; - printk_debug - ("0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n", + printk(BIOS_DEBUG, "0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n", func, bus, devfn, reg, *pecx); *peax = 0; retval = 0; } break; default: - printk_err("UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func); + printk(BIOS_ERR, "UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func); break; } diff --git a/src/northbridge/via/vx800/vx800_ide.c b/src/northbridge/via/vx800/vx800_ide.c index 673d6152ad..b3d6bc2c02 100644 --- a/src/northbridge/via/vx800/vx800_ide.c +++ b/src/northbridge/via/vx800/vx800_ide.c @@ -169,7 +169,7 @@ static void ide_init(struct device *dev) uint8_t enables, Rx89, RxC0; u8 i, data; struct ATA_REG_INIT_TABLE *pEntry; - printk_info("ide_init\n"); + printk(BIOS_INFO, "ide_init\n"); #if 1 /*these 3 lines help to keep interl back door for DID VID SUBID untouched */ @@ -207,14 +207,14 @@ static void ide_init(struct device *dev) enables |= 0x02; pci_write_config8(dev, IDE_CS, enables); enables = pci_read_config8(dev, IDE_CS); - printk_debug("Enables in reg 0x40 read back as 0x%x\n", enables); + printk(BIOS_DEBUG, "Enables in reg 0x40 read back as 0x%x\n", enables); /* Enable only compatibility mode. */ enables = pci_read_config8(dev, IDE_CONF_II); enables &= ~0xc0; pci_write_config8(dev, IDE_CONF_II, enables); enables = pci_read_config8(dev, IDE_CONF_II); - printk_debug("Enables in reg 0x42 read back as 0x%x\n", enables); + printk(BIOS_DEBUG, "Enables in reg 0x42 read back as 0x%x\n", enables); /* Enable prefetch buffers. */ enables = pci_read_config8(dev, IDE_CONF_I); diff --git a/src/northbridge/via/vx800/vx800_lpc.c b/src/northbridge/via/vx800/vx800_lpc.c index 2a4550ab45..7a74b65d3d 100644 --- a/src/northbridge/via/vx800/vx800_lpc.c +++ b/src/northbridge/via/vx800/vx800_lpc.c @@ -58,7 +58,7 @@ static unsigned char *pin_to_irq(const unsigned char *pin) static void pci_routing_fixup(struct device *dev) { - printk_info("%s: dev is %p\n", __FUNCTION__, dev); + printk(BIOS_INFO, "%s: dev is %p\n", __FUNCTION__, dev); /* set up PCI IRQ routing */ pci_write_config8(dev, 0x55, pciIrqs[0] << 4); @@ -66,42 +66,42 @@ static void pci_routing_fixup(struct device *dev) pci_write_config8(dev, 0x57, pciIrqs[3] << 4); /* VGA */ - printk_info("setting vga\n"); + printk(BIOS_INFO, "setting vga\n"); pci_assign_irqs(0, 0x1, pin_to_irq(vgaPins)); /* PCI slot */ - printk_info("setting pci slot\n"); + printk(BIOS_INFO, "setting pci slot\n"); pci_assign_irqs(0, 0x08, pin_to_irq(slotPins)); /* PCI slot */ - printk_info("setting USB Device Controller\n"); + printk(BIOS_INFO, "setting USB Device Controller\n"); pci_assign_irqs(0, 0x0b, pin_to_irq(usbdevicePins)); /* PCI slot */ - printk_info("setting SDIO Controller\n"); + printk(BIOS_INFO, "setting SDIO Controller\n"); pci_assign_irqs(0, 0x0c, pin_to_irq(sdioPins)); /* PCI slot */ - printk_info("setting SD $ MS Controller\n"); + printk(BIOS_INFO, "setting SD $ MS Controller\n"); pci_assign_irqs(0, 0x0d, pin_to_irq(sd_ms_ctrl_Pins)); /* PCI slot */ - printk_info("setting CE-ATA NF Controller(Card Boot)\n"); + printk(BIOS_INFO, "setting CE-ATA NF Controller(Card Boot)\n"); pci_assign_irqs(0, 0x0e, pin_to_irq(ce_ata_nf_ctrl_Pins)); /* PCI slot */ - printk_info("setting ide\n"); + printk(BIOS_INFO, "setting ide\n"); //pci_assign_irqs(0, 0x0f, pin_to_irq(idePins)); /* Standard usb components */ - printk_info("setting usb1-2\n"); + printk(BIOS_INFO, "setting usb1-2\n"); // pci_assign_irqs(0, 0x10, pin_to_irq(usbPins)); /* sound hardware */ - printk_info("setting hdac audio\n"); + printk(BIOS_INFO, "setting hdac audio\n"); pci_assign_irqs(0, 0x14, pin_to_irq(hdacaudioPins)); - printk_spew("%s: DONE\n", __FUNCTION__); + printk(BIOS_SPEW, "%s: DONE\n", __FUNCTION__); } void setup_pm(device_t dev) @@ -335,7 +335,7 @@ void vx800_enable_resources(device_t dev) static void southbridge_init(struct device *dev) { - printk_debug("vx800 sb init\n"); + printk(BIOS_DEBUG, "vx800 sb init\n"); vx800_sb_init(dev); pci_routing_fixup(dev); @@ -343,8 +343,7 @@ static void southbridge_init(struct device *dev) /* turn on keyboard and RTC, no need to visit this reg twice */ pc_keyboard_init(0); - printk_debug - ("ps2 usb lid, you set who can wakeup system from s3 sleep\n"); + printk(BIOS_DEBUG, "ps2 usb lid, you set who can wakeup system from s3 sleep\n"); S3_ps2_kb_ms_wakeup(dev); S3_usb_wakeup(dev); |