diff options
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/agesa/family10/northbridge.c | 77 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family12/northbridge.c | 81 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family14/northbridge.c | 82 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family15/northbridge.c | 77 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family15rl/northbridge.c | 77 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family15tn/northbridge.c | 77 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family16kb/northbridge.c | 77 | ||||
| -rw-r--r-- | src/northbridge/amd/amdfam10/northbridge.c | 76 | ||||
| -rw-r--r-- | src/northbridge/amd/amdk8/northbridge.c | 68 | ||||
| -rw-r--r-- | src/northbridge/amd/pi/00630F01/northbridge.c | 77 | ||||
| -rw-r--r-- | src/northbridge/amd/pi/00730F01/northbridge.c | 78 |
11 files changed, 2 insertions, 845 deletions
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c index 5938e3275d..91b17b1eb4 100644 --- a/src/northbridge/amd/agesa/family10/northbridge.c +++ b/src/northbridge/amd/agesa/family10/northbridge.c @@ -635,29 +635,7 @@ static void amdfam10_domain_read_resources(device_t dev) /* FIXME: do we need to check extend conf space? I don't believe that much preset value */ -#if !CONFIG_PCI_64BIT_PREF_MEM pci_domain_read_resources(dev); -#else - struct bus *link; - struct resource *resource; - for (link=dev->link_list; link; link = link->next) { - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, 0|(link->link_num<<2)); - resource->base = 0x400; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO; - - /* Initialize the system wide prefetchable memory resources constraints */ - resource = new_resource(dev, 1|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, 2|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM; - } -#endif } static void amdfam10_domain_enable_resources(device_t dev) @@ -737,10 +715,6 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void) static void amdfam10_domain_set_resources(device_t dev) { -#if CONFIG_PCI_64BIT_PREF_MEM - struct resource *io, *mem1, *mem2; - struct resource *res; -#endif unsigned long mmio_basek; u32 pci_tolm; u64 ramtop = 0; @@ -751,57 +725,6 @@ static void amdfam10_domain_set_resources(device_t dev) u32 reset_memhole = 1; #endif -#if CONFIG_PCI_64BIT_PREF_MEM - - for (link = dev->link_list; link; link = link->next) { - /* Now reallocate the pci resources memory with the - * highest addresses I can manage. - */ - mem1 = find_resource(dev, 1|(link->link_num<<2)); - mem2 = find_resource(dev, 2|(link->link_num<<2)); - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - - /* See if both resources have roughly the same limits */ - if (((mem1->limit <= 0xffffffff) && (mem2->limit <= 0xffffffff)) || - ((mem1->limit > 0xffffffff) && (mem2->limit > 0xffffffff))) - { - /* If so place the one with the most stringent alignment first - */ - if (mem2->align > mem1->align) { - struct resource *tmp; - tmp = mem1; - mem1 = mem2; - mem2 = tmp; - } - /* Now place the memory as high up as it will go */ - mem2->base = resource_max(mem2); - mem1->limit = mem2->base - 1; - mem1->base = resource_max(mem1); - } - else { - /* Place the resources as high up as they will go */ - mem2->base = resource_max(mem2); - mem1->base = resource_max(mem1); - } - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - } - - for (res = &dev->resource_list; res; res = res->next) - { - res->flags |= IORESOURCE_ASSIGNED; - res->flags |= IORESOURCE_STORED; - report_resource_stored(dev, res, ""); - } -#endif - pci_tolm = 0xffffffffUL; for (link = dev->link_list; link; link = link->next) { pci_tolm = my_find_pci_tolm(link, pci_tolm); diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c index ec1f493798..f1305b9b5c 100644 --- a/src/northbridge/amd/agesa/family12/northbridge.c +++ b/src/northbridge/amd/agesa/family12/northbridge.c @@ -509,9 +509,6 @@ static void domain_read_resources(device_t dev) /* FIXME: do we need to check extend conf space? I don't believe that much preset value */ -#if !CONFIG_PCI_64BIT_PREF_MEM -//- pci_domain_read_resources(dev); - struct resource *resource; /* Initialize the system-wide I/O space constraints. */ resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); @@ -526,27 +523,7 @@ static void domain_read_resources(device_t dev) resource->limit = 0xdfffffffULL; resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -#else - struct bus *link; - struct resource *resource; - for(link=dev->link_list; link; link = link->next) { - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, 0|(link->link_num<<2)); - resource->base = 0x400; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO; - - /* Initialize the system wide prefetchable memory resources constraints */ - resource = new_resource(dev, 1|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, 2|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM; - } -#endif + printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__); } @@ -556,10 +533,6 @@ static void domain_set_resources(device_t dev) printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__); printk(BIOS_DEBUG, " amsr - incoming dev = %08x\n", (u32) dev); -#if CONFIG_PCI_64BIT_PREF_MEM - struct resource *io, *mem1, *mem2; - struct resource *res; -#endif unsigned long mmio_basek; u32 pci_tolm; u64 ramtop = 0; @@ -570,58 +543,6 @@ static void domain_set_resources(device_t dev) u32 reset_memhole = 1; #endif -#if CONFIG_PCI_64BIT_PREF_MEM - -printk(BIOS_DEBUG, "adsr - CONFIG_PCI_64BIT_PREF_MEM is true.\n"); - for(link = dev->link_list; link; link = link->next) { - /* Now reallocate the pci resources memory with the - * highest addresses I can manage. - */ - mem1 = find_resource(dev, 1|(link->link_num<<2)); - mem2 = find_resource(dev, 2|(link->link_num<<2)); - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - - /* See if both resources have roughly the same limits */ - if (((mem1->limit <= 0xffffffff) && (mem2->limit <= 0xffffffff)) || - ((mem1->limit > 0xffffffff) && (mem2->limit > 0xffffffff))) - { - /* If so place the one with the most stringent alignment first - */ - if (mem2->align > mem1->align) { - struct resource *tmp; - tmp = mem1; - mem1 = mem2; - mem2 = tmp; - } - /* Now place the memory as high up as it will go */ - mem2->base = resource_max(mem2); - mem1->limit = mem2->base - 1; - mem1->base = resource_max(mem1); - } - else { - /* Place the resources as high up as they will go */ - mem2->base = resource_max(mem2); - mem1->base = resource_max(mem1); - } - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - } - - for(res = &dev->resource_list; res; res = res->next) - { - res->flags |= IORESOURCE_ASSIGNED; - res->flags |= IORESOURCE_STORED; - report_resource_stored(dev, res, ""); - } -#endif - pci_tolm = 0xffffffffUL; for(link = dev->link_list; link; link = link->next) { pci_tolm = my_find_pci_tolm(link, pci_tolm); diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index 6d3a17377f..fcc0d87580 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -498,29 +498,7 @@ static void domain_read_resources(device_t dev) /* FIXME: do we need to check extend conf space? I don't believe that much preset value */ -#if !CONFIG_PCI_64BIT_PREF_MEM pci_domain_read_resources(dev); -#else - struct bus *link; - struct resource *resource; - for (link = dev->link_list; link; link = link->next) { - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, 0 | (link->link_num << 2)); - resource->base = 0x400; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO; - - /* Initialize the system wide prefetchable memory resources constraints */ - resource = new_resource(dev, 1 | (link->link_num << 2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, 2 | (link->link_num << 2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM; - } -#endif } static void setup_uma_memory(void) @@ -553,10 +531,6 @@ static void domain_set_resources(device_t dev) printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); printk(BIOS_DEBUG, " amsr - incoming dev = %08x\n", (u32) dev); -#if CONFIG_PCI_64BIT_PREF_MEM - struct resource *io, *mem1, *mem2; - struct resource *res; -#endif unsigned long mmio_basek; u32 pci_tolm; u64 ramtop = 0; @@ -567,62 +541,6 @@ static void domain_set_resources(device_t dev) u32 reset_memhole = 1; #endif -#if CONFIG_PCI_64BIT_PREF_MEM - - printk(BIOS_DEBUG, "adsr - CONFIG_PCI_64BIT_PREF_MEM is true.\n"); - for (link = dev->link_list; link; link = link->next) { - /* Now reallocate the pci resources memory with the - * highest addresses I can manage. - */ - mem1 = find_resource(dev, 1 | (link->link_num << 2)); - mem2 = find_resource(dev, 2 | (link->link_num << 2)); - - printk(BIOS_DEBUG, - "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - (u32) (mem1->base), (u32) (mem1->limit), - (u32) (mem1->size), u32) (mem1->align)); - printk(BIOS_DEBUG, - "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - (u32) (mem2->base), (u32) (mem2->limit), - (u32) (mem2->size), (u32) (mem2->align)); - - /* See if both resources have roughly the same limits */ - if (((mem1->limit <= 0xffffffff) && (mem2->limit <= 0xffffffff)) - || ((mem1->limit > 0xffffffff) - && (mem2->limit > 0xffffffff))) { - /* If so place the one with the most stringent alignment first - */ - if (mem2->align > mem1->align) { - struct resource *tmp; - tmp = mem1; - mem1 = mem2; - mem2 = tmp; - } - /* Now place the memory as high up as it will go */ - mem2->base = resource_max(mem2); - mem1->limit = mem2->base - 1; - mem1->base = resource_max(mem1); - } else { - /* Place the resources as high up as they will go */ - mem2->base = resource_max(mem2); - mem1->base = resource_max(mem1); - } - - printk(BIOS_DEBUG, - "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, - "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - } - - for (res = &dev->resource_list; res; res = res->next) { - res->flags |= IORESOURCE_ASSIGNED; - res->flags |= IORESOURCE_STORED; - report_resource_stored(dev, res, ""); - } -#endif - pci_tolm = 0xffffffffUL; for (link = dev->link_list; link; link = link->next) { pci_tolm = my_find_pci_tolm(link, pci_tolm); diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index cda0ca797c..d0e05fb85d 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -658,30 +658,7 @@ static void domain_read_resources(device_t dev) /* FIXME: do we need to check extend conf space? I don't believe that much preset value */ -#if !CONFIG_PCI_64BIT_PREF_MEM pci_domain_read_resources(dev); - -#else - struct bus *link; - struct resource *resource; - for (link=dev->link_list; link; link = link->next) { - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, 0|(link->link_num<<2)); - resource->base = 0x400; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO; - - /* Initialize the system wide prefetchable memory resources constraints */ - resource = new_resource(dev, 1|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, 2|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM; - } -#endif } static void domain_enable_resources(device_t dev) @@ -782,10 +759,6 @@ static void setup_uma_memory(void) static void domain_set_resources(device_t dev) { -#if CONFIG_PCI_64BIT_PREF_MEM - struct resource *io, *mem1, *mem2; - struct resource *res; -#endif unsigned long mmio_basek; u32 pci_tolm; u64 ramtop = 0; @@ -796,56 +769,6 @@ static void domain_set_resources(device_t dev) u32 reset_memhole = 1; #endif -#if CONFIG_PCI_64BIT_PREF_MEM - - for (link = dev->link_list; link; link = link->next) { - /* Now reallocate the pci resources memory with the - * highest addresses I can manage. - */ - mem1 = find_resource(dev, 1|(link->link_num<<2)); - mem2 = find_resource(dev, 2|(link->link_num<<2)); - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - - /* See if both resources have roughly the same limits */ - if (((mem1->limit <= 0xffffffff) && (mem2->limit <= 0xffffffff)) || - ((mem1->limit > 0xffffffff) && (mem2->limit > 0xffffffff))) - { - /* If so place the one with the most stringent alignment first */ - if (mem2->align > mem1->align) { - struct resource *tmp; - tmp = mem1; - mem1 = mem2; - mem2 = tmp; - } - /* Now place the memory as high up as it will go */ - mem2->base = resource_max(mem2); - mem1->limit = mem2->base - 1; - mem1->base = resource_max(mem1); - } - else { - /* Place the resources as high up as they will go */ - mem2->base = resource_max(mem2); - mem1->base = resource_max(mem1); - } - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - } - - for (res = &dev->resource_list; res; res = res->next) - { - res->flags |= IORESOURCE_ASSIGNED; - res->flags |= IORESOURCE_STORED; - report_resource_stored(dev, res, ""); - } -#endif - pci_tolm = 0xffffffffUL; for (link = dev->link_list; link; link = link->next) { pci_tolm = find_pci_tolm(link); diff --git a/src/northbridge/amd/agesa/family15rl/northbridge.c b/src/northbridge/amd/agesa/family15rl/northbridge.c index 199843e087..62486b8094 100644 --- a/src/northbridge/amd/agesa/family15rl/northbridge.c +++ b/src/northbridge/amd/agesa/family15rl/northbridge.c @@ -652,30 +652,7 @@ static void domain_read_resources(struct device *dev) /* FIXME: do we need to check extend conf space? I don't believe that much preset value */ -#if !CONFIG_PCI_64BIT_PREF_MEM pci_domain_read_resources(dev); - -#else - struct bus *link; - struct resource *resource; - for (link=dev->link_list; link; link = link->next) { - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, 0|(link->link_num<<2)); - resource->base = 0x400; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO; - - /* Initialize the system wide prefetchable memory resources constraints */ - resource = new_resource(dev, 1|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, 2|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM; - } -#endif } static void domain_enable_resources(struct device *dev) @@ -776,10 +753,6 @@ static void setup_uma_memory(void) static void domain_set_resources(struct device *dev) { -#if CONFIG_PCI_64BIT_PREF_MEM - struct resource *io, *mem1, *mem2; - struct resource *res; -#endif unsigned long mmio_basek; u32 pci_tolm; u64 ramtop = 0; @@ -790,56 +763,6 @@ static void domain_set_resources(struct device *dev) u32 reset_memhole = 1; #endif -#if CONFIG_PCI_64BIT_PREF_MEM - - for (link = dev->link_list; link; link = link->next) { - /* Now reallocate the pci resources memory with the - * highest addresses I can manage. - */ - mem1 = find_resource(dev, 1|(link->link_num<<2)); - mem2 = find_resource(dev, 2|(link->link_num<<2)); - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - - /* See if both resources have roughly the same limits */ - if (((mem1->limit <= 0xffffffff) && (mem2->limit <= 0xffffffff)) || - ((mem1->limit > 0xffffffff) && (mem2->limit > 0xffffffff))) - { - /* If so place the one with the most stringent alignment first */ - if (mem2->align > mem1->align) { - struct resource *tmp; - tmp = mem1; - mem1 = mem2; - mem2 = tmp; - } - /* Now place the memory as high up as it will go */ - mem2->base = resource_max(mem2); - mem1->limit = mem2->base - 1; - mem1->base = resource_max(mem1); - } - else { - /* Place the resources as high up as they will go */ - mem2->base = resource_max(mem2); - mem1->base = resource_max(mem1); - } - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - } - - for (res = &dev->resource_list; res; res = res->next) - { - res->flags |= IORESOURCE_ASSIGNED; - res->flags |= IORESOURCE_STORED; - report_resource_stored(dev, res, ""); - } -#endif - pci_tolm = 0xffffffffUL; for (link = dev->link_list; link; link = link->next) { pci_tolm = find_pci_tolm(link); diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index 85b9799255..b043ccc4d1 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -651,30 +651,7 @@ static void domain_read_resources(device_t dev) /* FIXME: do we need to check extend conf space? I don't believe that much preset value */ -#if !CONFIG_PCI_64BIT_PREF_MEM pci_domain_read_resources(dev); - -#else - struct bus *link; - struct resource *resource; - for (link=dev->link_list; link; link = link->next) { - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, 0|(link->link_num<<2)); - resource->base = 0x400; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO; - - /* Initialize the system wide prefetchable memory resources constraints */ - resource = new_resource(dev, 1|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, 2|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM; - } -#endif } static void domain_enable_resources(device_t dev) @@ -775,10 +752,6 @@ static void setup_uma_memory(void) static void domain_set_resources(device_t dev) { -#if CONFIG_PCI_64BIT_PREF_MEM - struct resource *io, *mem1, *mem2; - struct resource *res; -#endif unsigned long mmio_basek; u32 pci_tolm; u64 ramtop = 0; @@ -789,56 +762,6 @@ static void domain_set_resources(device_t dev) u32 reset_memhole = 1; #endif -#if CONFIG_PCI_64BIT_PREF_MEM - - for (link = dev->link_list; link; link = link->next) { - /* Now reallocate the pci resources memory with the - * highest addresses I can manage. - */ - mem1 = find_resource(dev, 1|(link->link_num<<2)); - mem2 = find_resource(dev, 2|(link->link_num<<2)); - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - - /* See if both resources have roughly the same limits */ - if (((mem1->limit <= 0xffffffff) && (mem2->limit <= 0xffffffff)) || - ((mem1->limit > 0xffffffff) && (mem2->limit > 0xffffffff))) - { - /* If so place the one with the most stringent alignment first */ - if (mem2->align > mem1->align) { - struct resource *tmp; - tmp = mem1; - mem1 = mem2; - mem2 = tmp; - } - /* Now place the memory as high up as it will go */ - mem2->base = resource_max(mem2); - mem1->limit = mem2->base - 1; - mem1->base = resource_max(mem1); - } - else { - /* Place the resources as high up as they will go */ - mem2->base = resource_max(mem2); - mem1->base = resource_max(mem1); - } - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - } - - for (res = &dev->resource_list; res; res = res->next) - { - res->flags |= IORESOURCE_ASSIGNED; - res->flags |= IORESOURCE_STORED; - report_resource_stored(dev, res, ""); - } -#endif - pci_tolm = 0xffffffffUL; for (link = dev->link_list; link; link = link->next) { pci_tolm = find_pci_tolm(link); diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index 25f40b8c85..275ed3d6fa 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -666,30 +666,7 @@ static void domain_read_resources(device_t dev) /* FIXME: do we need to check extend conf space? I don't believe that much preset value */ -#if !CONFIG_PCI_64BIT_PREF_MEM pci_domain_read_resources(dev); - -#else - struct bus *link; - struct resource *resource; - for (link=dev->link_list; link; link = link->next) { - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, 0|(link->link_num<<2)); - resource->base = 0x400; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO; - - /* Initialize the system wide prefetchable memory resources constraints */ - resource = new_resource(dev, 1|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, 2|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM; - } -#endif } static void domain_enable_resources(device_t dev) @@ -792,10 +769,6 @@ static void setup_uma_memory(void) static void domain_set_resources(device_t dev) { -#if CONFIG_PCI_64BIT_PREF_MEM - struct resource *io, *mem1, *mem2; - struct resource *res; -#endif unsigned long mmio_basek; u32 pci_tolm; u64 ramtop = 0; @@ -806,56 +779,6 @@ static void domain_set_resources(device_t dev) u32 reset_memhole = 1; #endif -#if CONFIG_PCI_64BIT_PREF_MEM - - for (link = dev->link_list; link; link = link->next) { - /* Now reallocate the pci resources memory with the - * highest addresses I can manage. - */ - mem1 = find_resource(dev, 1|(link->link_num<<2)); - mem2 = find_resource(dev, 2|(link->link_num<<2)); - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - - /* See if both resources have roughly the same limits */ - if (((mem1->limit <= 0xffffffff) && (mem2->limit <= 0xffffffff)) || - ((mem1->limit > 0xffffffff) && (mem2->limit > 0xffffffff))) - { - /* If so place the one with the most stringent alignment first */ - if (mem2->align > mem1->align) { - struct resource *tmp; - tmp = mem1; - mem1 = mem2; - mem2 = tmp; - } - /* Now place the memory as high up as it will go */ - mem2->base = resource_max(mem2); - mem1->limit = mem2->base - 1; - mem1->base = resource_max(mem1); - } - else { - /* Place the resources as high up as they will go */ - mem2->base = resource_max(mem2); - mem1->base = resource_max(mem1); - } - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - } - - for (res = &dev->resource_list; res; res = res->next) - { - res->flags |= IORESOURCE_ASSIGNED; - res->flags |= IORESOURCE_STORED; - report_resource_stored(dev, res, ""); - } -#endif - pci_tolm = 0xffffffffUL; for (link = dev->link_list; link; link = link->next) { pci_tolm = find_pci_tolm(link); diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index e9d12c78e0..b3ad08bdfc 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -611,29 +611,8 @@ static void amdfam10_domain_read_resources(device_t dev) /* FIXME: do we need to check extend conf space? I don't believe that much preset value */ -#if !CONFIG_PCI_64BIT_PREF_MEM pci_domain_read_resources(dev); -#else - struct bus *link; - struct resource *resource; - for(link=dev->link_list; link; link = link->next) { - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, 0|(link->link_num<<2)); - resource->base = 0x400; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO; - /* Initialize the system wide prefetchable memory resources constraints */ - resource = new_resource(dev, 1|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, 2|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM; - } -#endif #if CONFIG_MMCONF_SUPPORT struct resource *res = new_resource(dev, 0xc0010058); res->base = CONFIG_MMCONF_BASE_ADDRESS; @@ -729,10 +708,6 @@ static void setup_uma_memory(void) static void amdfam10_domain_set_resources(device_t dev) { -#if CONFIG_PCI_64BIT_PREF_MEM - struct resource *mem1, *mem2; - struct resource *res; -#endif unsigned long mmio_basek; u32 pci_tolm; int i, idx; @@ -742,57 +717,6 @@ static void amdfam10_domain_set_resources(device_t dev) u32 reset_memhole = 1; #endif -#if CONFIG_PCI_64BIT_PREF_MEM - - for(link = dev->link_list; link; link = link->next) { - /* Now reallocate the pci resources memory with the - * highest addresses I can manage. - */ - mem1 = find_resource(dev, 1|(link->link_num<<2)); - mem2 = find_resource(dev, 2|(link->link_num<<2)); - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - - /* See if both resources have roughly the same limits */ - if (((mem1->limit <= 0xffffffff) && (mem2->limit <= 0xffffffff)) || - ((mem1->limit > 0xffffffff) && (mem2->limit > 0xffffffff))) - { - /* If so place the one with the most stringent alignment first - */ - if (mem2->align > mem1->align) { - struct resource *tmp; - tmp = mem1; - mem1 = mem2; - mem2 = tmp; - } - /* Now place the memory as high up as it will go */ - mem2->base = resource_max(mem2); - mem1->limit = mem2->base - 1; - mem1->base = resource_max(mem1); - } - else { - /* Place the resources as high up as they will go */ - mem2->base = resource_max(mem2); - mem1->base = resource_max(mem1); - } - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - } - - for(res = dev->resource_list; res; res = res->next) - { - res->flags |= IORESOURCE_ASSIGNED; - res->flags |= IORESOURCE_STORED; - report_resource_stored(dev, res, ""); - } -#endif - pci_tolm = 0xffffffffUL; for(link = dev->link_list; link; link = link->next) { pci_tolm = my_find_pci_tolm(link, pci_tolm); diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 9b5735f3dd..55f3c4dc7e 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -634,13 +634,6 @@ static void amdk8_domain_read_resources(device_t dev) } pci_domain_read_resources(dev); - -#if CONFIG_PCI_64BIT_PREF_MEM - /* Initialize the system wide prefetchable memory resources constraints */ - resource = new_resource(dev, 2); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; -#endif } static void my_tolm_test(void *gp, struct device *dev, struct resource *new) @@ -871,10 +864,6 @@ static void setup_uma_memory(void) static void amdk8_domain_set_resources(device_t dev) { -#if CONFIG_PCI_64BIT_PREF_MEM - struct resource *io, *mem1, *mem2; - struct resource *res; -#endif unsigned long mmio_basek; u32 pci_tolm; u64 ramtop = 0; @@ -884,63 +873,6 @@ static void amdk8_domain_set_resources(device_t dev) u32 reset_memhole = 1; #endif -#if 0 - /* Place the IO devices somewhere safe */ - io = find_resource(dev, 0); - io->base = DEVICE_IO_START; -#endif -#if CONFIG_PCI_64BIT_PREF_MEM - /* Now reallocate the pci resources memory with the - * highest addresses I can manage. - */ - mem1 = find_resource(dev, 1); - mem2 = find_resource(dev, 2); - -#if 1 - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); -#endif - - /* See if both resources have roughly the same limits */ - if (((mem1->limit <= 0xffffffff) && (mem2->limit <= 0xffffffff)) || - ((mem1->limit > 0xffffffff) && (mem2->limit > 0xffffffff))) - { - /* If so place the one with the most stringent alignment first - */ - if (mem2->align > mem1->align) { - struct resource *tmp; - tmp = mem1; - mem1 = mem2; - mem2 = tmp; - } - /* Now place the memory as high up as it will go */ - mem2->base = resource_max(mem2); - mem1->limit = mem2->base - 1; - mem1->base = resource_max(mem1); - } - else { - /* Place the resources as high up as they will go */ - mem2->base = resource_max(mem2); - mem1->base = resource_max(mem1); - } - -#if 1 - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); -#endif - - for(res = dev->resource_list; res; res = res->next) - { - res->flags |= IORESOURCE_ASSIGNED; - res->flags |= IORESOURCE_STORED; - report_resource_stored(dev, res, ""); - } -#endif - pci_tolm = my_find_pci_tolm(dev->link_list); // FIXME handle interleaved nodes. If you fix this here, please fix diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c index acecb28136..06a319354f 100644 --- a/src/northbridge/amd/pi/00630F01/northbridge.c +++ b/src/northbridge/amd/pi/00630F01/northbridge.c @@ -643,29 +643,8 @@ static void domain_read_resources(device_t dev) /* FIXME: do we need to check extend conf space? I don't believe that much preset value */ - if (!IS_ENABLED(CONFIG_PCI_64BIT_PREF_MEM)) pci_domain_read_resources(dev); - else { - struct bus *link; - struct resource *resource; - for (link=dev->link_list; link; link = link->next) { - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, 0|(link->link_num<<2)); - resource->base = 0x400; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO; - - /* Initialize the system wide prefetchable memory resources constraints */ - resource = new_resource(dev, 1|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, 2|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM; - } - } + } static void domain_enable_resources(device_t dev) @@ -769,10 +748,6 @@ static void setup_uma_memory(void) static void domain_set_resources(device_t dev) { -#if CONFIG_PCI_64BIT_PREF_MEM - struct resource *io, *mem1, *mem2; - struct resource *res; -#endif unsigned long mmio_basek; u32 pci_tolm; u64 ramtop = 0; @@ -783,56 +758,6 @@ static void domain_set_resources(device_t dev) u32 reset_memhole = 1; #endif -#if CONFIG_PCI_64BIT_PREF_MEM - - for (link = dev->link_list; link; link = link->next) { - /* Now reallocate the pci resources memory with the - * highest addresses I can manage. - */ - mem1 = find_resource(dev, 1|(link->link_num<<2)); - mem2 = find_resource(dev, 2|(link->link_num<<2)); - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - - /* See if both resources have roughly the same limits */ - if (((mem1->limit <= 0xffffffff) && (mem2->limit <= 0xffffffff)) || - ((mem1->limit > 0xffffffff) && (mem2->limit > 0xffffffff))) - { - /* If so place the one with the most stringent alignment first */ - if (mem2->align > mem1->align) { - struct resource *tmp; - tmp = mem1; - mem1 = mem2; - mem2 = tmp; - } - /* Now place the memory as high up as it will go */ - mem2->base = resource_max(mem2); - mem1->limit = mem2->base - 1; - mem1->base = resource_max(mem1); - } - else { - /* Place the resources as high up as they will go */ - mem2->base = resource_max(mem2); - mem1->base = resource_max(mem1); - } - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - } - - for (res = &dev->resource_list; res; res = res->next) - { - res->flags |= IORESOURCE_ASSIGNED; - res->flags |= IORESOURCE_STORED; - report_resource_stored(dev, res, ""); - } -#endif - pci_tolm = 0xffffffffUL; for (link = dev->link_list; link; link = link->next) { pci_tolm = find_pci_tolm(link); diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 3e5b2b23fe..24055eb638 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -652,31 +652,7 @@ static void domain_read_resources(device_t dev) } /* FIXME: do we need to check extend conf space? I don't believe that much preset value */ - -#if !CONFIG_PCI_64BIT_PREF_MEM pci_domain_read_resources(dev); - -#else - struct bus *link; - struct resource *resource; - for (link=dev->link_list; link; link = link->next) { - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, 0|(link->link_num<<2)); - resource->base = 0x400; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO; - - /* Initialize the system wide prefetchable memory resources constraints */ - resource = new_resource(dev, 1|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, 2|(link->link_num<<2)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM; - } -#endif } static void domain_enable_resources(device_t dev) @@ -785,10 +761,6 @@ static void setup_uma_memory(void) static void domain_set_resources(device_t dev) { -#if CONFIG_PCI_64BIT_PREF_MEM - struct resource *io, *mem1, *mem2; - struct resource *res; -#endif unsigned long mmio_basek; u32 pci_tolm; u64 ramtop = 0; @@ -799,56 +771,6 @@ static void domain_set_resources(device_t dev) u32 reset_memhole = 1; #endif -#if CONFIG_PCI_64BIT_PREF_MEM - - for (link = dev->link_list; link; link = link->next) { - /* Now reallocate the pci resources memory with the - * highest addresses I can manage. - */ - mem1 = find_resource(dev, 1|(link->link_num<<2)); - mem2 = find_resource(dev, 2|(link->link_num<<2)); - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - - /* See if both resources have roughly the same limits */ - if (((mem1->limit <= 0xffffffff) && (mem2->limit <= 0xffffffff)) || - ((mem1->limit > 0xffffffff) && (mem2->limit > 0xffffffff))) - { - /* If so place the one with the most stringent alignment first */ - if (mem2->align > mem1->align) { - struct resource *tmp; - tmp = mem1; - mem1 = mem2; - mem2 = tmp; - } - /* Now place the memory as high up as it will go */ - mem2->base = resource_max(mem2); - mem1->limit = mem2->base - 1; - mem1->base = resource_max(mem1); - } - else { - /* Place the resources as high up as they will go */ - mem2->base = resource_max(mem2); - mem1->base = resource_max(mem1); - } - - printk(BIOS_DEBUG, "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", - mem1->base, mem1->limit, mem1->size, mem1->align); - printk(BIOS_DEBUG, "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", - mem2->base, mem2->limit, mem2->size, mem2->align); - } - - for (res = &dev->resource_list; res; res = res->next) - { - res->flags |= IORESOURCE_ASSIGNED; - res->flags |= IORESOURCE_STORED; - report_resource_stored(dev, res, ""); - } -#endif - pci_tolm = 0xffffffffUL; for (link = dev->link_list; link; link = link->next) { pci_tolm = find_pci_tolm(link); |