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-rw-r--r--src/northbridge/intel/fsp_sandybridge/northbridge.c11
-rw-r--r--src/northbridge/intel/nehalem/northbridge.c11
-rw-r--r--src/northbridge/intel/sandybridge/northbridge.c11
3 files changed, 9 insertions, 24 deletions
diff --git a/src/northbridge/intel/fsp_sandybridge/northbridge.c b/src/northbridge/intel/fsp_sandybridge/northbridge.c
index 99d8fbbcf4..50615b5f2d 100644
--- a/src/northbridge/intel/fsp_sandybridge/northbridge.c
+++ b/src/northbridge/intel/fsp_sandybridge/northbridge.c
@@ -325,16 +325,11 @@ static u32 northbridge_get_base_reg(device_t dev, int reg)
return value;
}
-void
-northbridge_get_tseg_base_and_size(u32 *tsegmb, u32 *tseg_size)
+u32 northbridge_get_tseg_base(void)
{
- device_t dev;
- u32 bgsm;
- dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+ const device_t dev = dev_find_slot(0, PCI_DEVFN(0, 0));
- *tsegmb = northbridge_get_base_reg(dev, TSEG);
- bgsm = northbridge_get_base_reg(dev, BGSM);
- *tseg_size = bgsm - *tsegmb;
+ return northbridge_get_base_reg(dev, TSEG);
}
void northbridge_write_smram(u8 smram)
diff --git a/src/northbridge/intel/nehalem/northbridge.c b/src/northbridge/intel/nehalem/northbridge.c
index 7f44272593..06c0a9655b 100644
--- a/src/northbridge/intel/nehalem/northbridge.c
+++ b/src/northbridge/intel/nehalem/northbridge.c
@@ -162,16 +162,11 @@ static void mc_read_resources(device_t dev)
add_fixed_resources(dev, 10);
}
-void
-northbridge_get_tseg_base_and_size(u32 *tsegmb, u32 *tseg_size)
+u32 northbridge_get_tseg_base(void)
{
- device_t dev;
- u32 bgsm;
- dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+ const device_t dev = dev_find_slot(0, PCI_DEVFN(0, 0));
- *tsegmb = pci_read_config32(dev, TSEG) & ~1;
- bgsm = pci_read_config32(dev, D0F0_GTT_BASE);
- *tseg_size = bgsm - *tsegmb;
+ return pci_read_config32(dev, TSEG) & ~1;
}
static void mc_set_resources(device_t dev)
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 53d93a2501..a67b84ddf4 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -500,16 +500,11 @@ static u32 northbridge_get_base_reg(device_t dev, int reg)
return value;
}
-void
-northbridge_get_tseg_base_and_size(u32 *tsegmb, u32 *tseg_size)
+u32 northbridge_get_tseg_base(void)
{
- device_t dev;
- u32 bgsm;
- dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+ const device_t dev = dev_find_slot(0, PCI_DEVFN(0, 0));
- *tsegmb = northbridge_get_base_reg(dev, TSEG);
- bgsm = northbridge_get_base_reg(dev, BGSM);
- *tseg_size = bgsm - *tsegmb;
+ return northbridge_get_base_reg(dev, TSEG);
}
void northbridge_write_smram(u8 smram)