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-rw-r--r--src/northbridge/amd/agesa/family14/dimmSpd.c4
-rw-r--r--src/northbridge/amd/agesa/family15/dimmSpd.c4
-rw-r--r--src/northbridge/amd/agesa/family15rl/dimmSpd.c4
-rw-r--r--src/northbridge/amd/agesa/family15tn/dimmSpd.c4
-rw-r--r--src/northbridge/amd/agesa/family16kb/dimmSpd.c4
-rw-r--r--src/northbridge/amd/pi/00630F01/dimmSpd.c4
-rw-r--r--src/northbridge/amd/pi/00660F01/dimmSpd.c4
-rw-r--r--src/northbridge/amd/pi/00670F00/dimmSpd.c4
-rw-r--r--src/northbridge/amd/pi/00730F01/dimmSpd.c4
-rw-r--r--src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c4
10 files changed, 20 insertions, 20 deletions
diff --git a/src/northbridge/amd/agesa/family14/dimmSpd.c b/src/northbridge/amd/agesa/family14/dimmSpd.c
index f8c5b02f46..d992414bb5 100644
--- a/src/northbridge/amd/agesa/family14/dimmSpd.c
+++ b/src/northbridge/amd/agesa/family14/dimmSpd.c
@@ -34,11 +34,11 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
{
UINT8 spdAddress;
- ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
+ DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
if (dev == NULL)
return AGESA_ERROR;
- ROMSTAGE_CONST struct northbridge_amd_agesa_family14_config *config = dev->chip_info;
+ DEVTREE_CONST struct northbridge_amd_agesa_family14_config *config = dev->chip_info;
if (config == NULL)
return AGESA_ERROR;
diff --git a/src/northbridge/amd/agesa/family15/dimmSpd.c b/src/northbridge/amd/agesa/family15/dimmSpd.c
index de75701a8a..3b1220201a 100644
--- a/src/northbridge/amd/agesa/family15/dimmSpd.c
+++ b/src/northbridge/amd/agesa/family15/dimmSpd.c
@@ -34,11 +34,11 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
{
UINT8 spdAddress;
- ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
+ DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
if (dev == NULL)
return AGESA_ERROR;
- ROMSTAGE_CONST struct northbridge_amd_agesa_family15_config *config = dev->chip_info;
+ DEVTREE_CONST struct northbridge_amd_agesa_family15_config *config = dev->chip_info;
if (config == NULL)
return AGESA_ERROR;
diff --git a/src/northbridge/amd/agesa/family15rl/dimmSpd.c b/src/northbridge/amd/agesa/family15rl/dimmSpd.c
index 2c1de73104..7d0f2a1c9c 100644
--- a/src/northbridge/amd/agesa/family15rl/dimmSpd.c
+++ b/src/northbridge/amd/agesa/family15rl/dimmSpd.c
@@ -34,11 +34,11 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
{
UINT8 spdAddress;
- ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
+ DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
if (dev == NULL)
return AGESA_ERROR;
- ROMSTAGE_CONST struct northbridge_amd_agesa_family15rl_config *config = dev->chip_info;
+ DEVTREE_CONST struct northbridge_amd_agesa_family15rl_config *config = dev->chip_info;
if (config == NULL)
return AGESA_ERROR;
diff --git a/src/northbridge/amd/agesa/family15tn/dimmSpd.c b/src/northbridge/amd/agesa/family15tn/dimmSpd.c
index de45870601..6273843dbb 100644
--- a/src/northbridge/amd/agesa/family15tn/dimmSpd.c
+++ b/src/northbridge/amd/agesa/family15tn/dimmSpd.c
@@ -33,11 +33,11 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
{
UINT8 spdAddress;
- ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
+ DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
if (dev == NULL)
return AGESA_ERROR;
- ROMSTAGE_CONST struct northbridge_amd_agesa_family15tn_config *config = dev->chip_info;
+ DEVTREE_CONST struct northbridge_amd_agesa_family15tn_config *config = dev->chip_info;
if (config == NULL)
return AGESA_ERROR;
diff --git a/src/northbridge/amd/agesa/family16kb/dimmSpd.c b/src/northbridge/amd/agesa/family16kb/dimmSpd.c
index 82d67d5038..a2319bc110 100644
--- a/src/northbridge/amd/agesa/family16kb/dimmSpd.c
+++ b/src/northbridge/amd/agesa/family16kb/dimmSpd.c
@@ -33,11 +33,11 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
{
UINT8 spdAddress;
- ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
+ DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
if (dev == NULL)
return AGESA_ERROR;
- ROMSTAGE_CONST struct northbridge_amd_agesa_family16kb_config *config = dev->chip_info;
+ DEVTREE_CONST struct northbridge_amd_agesa_family16kb_config *config = dev->chip_info;
if (config == NULL)
return AGESA_ERROR;
diff --git a/src/northbridge/amd/pi/00630F01/dimmSpd.c b/src/northbridge/amd/pi/00630F01/dimmSpd.c
index eba0449ee1..31f6f59a70 100644
--- a/src/northbridge/amd/pi/00630F01/dimmSpd.c
+++ b/src/northbridge/amd/pi/00630F01/dimmSpd.c
@@ -29,8 +29,8 @@
AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
{
int spdAddress;
- ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
- ROMSTAGE_CONST struct northbridge_amd_pi_00630F01_config *config = dev->chip_info;
+ DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
+ DEVTREE_CONST struct northbridge_amd_pi_00630F01_config *config = dev->chip_info;
if ((dev == 0) || (config == 0))
return AGESA_ERROR;
diff --git a/src/northbridge/amd/pi/00660F01/dimmSpd.c b/src/northbridge/amd/pi/00660F01/dimmSpd.c
index 5c81f36f2c..6b773bc7fe 100644
--- a/src/northbridge/amd/pi/00660F01/dimmSpd.c
+++ b/src/northbridge/amd/pi/00660F01/dimmSpd.c
@@ -27,8 +27,8 @@
AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
{
int spdAddress;
- ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
- ROMSTAGE_CONST struct northbridge_amd_pi_00660F01_config *config = dev->chip_info;
+ DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
+ DEVTREE_CONST struct northbridge_amd_pi_00660F01_config *config = dev->chip_info;
if ((dev == 0) || (config == 0))
return AGESA_ERROR;
diff --git a/src/northbridge/amd/pi/00670F00/dimmSpd.c b/src/northbridge/amd/pi/00670F00/dimmSpd.c
index e0d67d7fb6..42512ce902 100644
--- a/src/northbridge/amd/pi/00670F00/dimmSpd.c
+++ b/src/northbridge/amd/pi/00670F00/dimmSpd.c
@@ -27,8 +27,8 @@
AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
{
int spdAddress;
- ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
- ROMSTAGE_CONST struct northbridge_amd_pi_00670F00_config *config = dev->chip_info;
+ DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
+ DEVTREE_CONST struct northbridge_amd_pi_00670F00_config *config = dev->chip_info;
if ((dev == 0) || (config == 0))
return AGESA_ERROR;
diff --git a/src/northbridge/amd/pi/00730F01/dimmSpd.c b/src/northbridge/amd/pi/00730F01/dimmSpd.c
index 9726042879..424bff16e2 100644
--- a/src/northbridge/amd/pi/00730F01/dimmSpd.c
+++ b/src/northbridge/amd/pi/00730F01/dimmSpd.c
@@ -29,8 +29,8 @@
AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
{
int spdAddress;
- ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
- ROMSTAGE_CONST struct northbridge_amd_pi_00730F01_config *config = dev->chip_info;
+ DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
+ DEVTREE_CONST struct northbridge_amd_pi_00730F01_config *config = dev->chip_info;
if ((dev == 0) || (config == 0))
return AGESA_ERROR;
diff --git a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
index 6a33eda202..ed79f45e8d 100644
--- a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
+++ b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
@@ -55,8 +55,8 @@ typedef struct northbridge_intel_fsp_rangeley_config config_t;
*/
static void ConfigureDefaultUpdData(UPD_DATA_REGION *UpdData)
{
- ROMSTAGE_CONST struct device *dev;
- ROMSTAGE_CONST config_t *config;
+ DEVTREE_CONST struct device *dev;
+ DEVTREE_CONST config_t *config;
printk(BIOS_DEBUG, "Configure Default UPD Data\n");
dev = dev_find_slot(0, SOC_DEV_FUNC);
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-07 22:20:18 +0000