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-rw-r--r--src/northbridge/intel/pineview/early_init.c22
1 files changed, 2 insertions, 20 deletions
diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c
index be6a5e27d6..1638f0e15a 100644
--- a/src/northbridge/intel/pineview/early_init.c
+++ b/src/northbridge/intel/pineview/early_init.c
@@ -135,26 +135,8 @@ static void early_misc_setup(void)
pci_write_config8(LPC, 0x8, 0x1d);
pci_write_config8(LPC, 0x8, 0x0);
RCBA32(0x3410) = 0x00020465;
- RCBA32(0x88) = 0x0011d000;
- RCBA32(0x1fc) = 0x60f;
- RCBA32(0x1f4) = 0x86000040;
- RCBA32(0x214) = 0x10030509;
- RCBA32(0x218) = 0x00020504;
- RCBA32(0x220) = 0xc5;
- RCBA32(0x3430) = 0x1;
- RCBA32(0x2027) = 0x38f6a70d;
- RCBA16(0x3e08) = 0x0080;
- RCBA16(0x3e48) = 0x0080;
- RCBA32(0x3e0e) = 0x00000080;
- RCBA32(0x3e4e) = 0x00000080;
- RCBA32(0x2034) = 0xb24577cc;
- RCBA32(0x1c) = 0x03128010;
- RCBA32(0x2010) = 0x400;
- RCBA32(0x3400) = 0x4;
- RCBA32(0x2080) = 0x18006007;
- RCBA32(0x20a0) = 0x18006007;
- RCBA32(0x20c0) = 0x18006007;
- RCBA32(0x20e0) = 0x18006007;
+
+ ich7_setup_cir();
pci_write_config32(PCI_DEV(0, 0x1d, 0), 0xca, 0x1);
pci_write_config32(PCI_DEV(0, 0x1d, 1), 0xca, 0x1);