diff options
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/haswell/northbridge.c | 20 |
1 files changed, 2 insertions, 18 deletions
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index 8d57c03b16..010cc07104 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -305,10 +305,7 @@ static void mc_add_dram_resources(device_t dev) /* * These are the host memory ranges that should be added: - * - 0 -> SMM_DEFAULT_BASE : cacheable - * - SMM_DEFAULT_BASE -> SMM_DEFAULT_BASE + SMM_DEFAULT_SIZE : - * cacheable and reserved - * - SMM_DEFAULT_BASE + SMM_DEFAULT_SIZE -> 0xa0000 : cacheable + * - 0 -> 0xa0000: cacheable * - 0xc0000 -> TSEG : cacheable * - TESG -> BGSM: cacheable with standard MTRRs and reserved * - BGSM -> TOLUD: not cacheable with standard MTRRs and reserved @@ -338,21 +335,8 @@ static void mc_add_dram_resources(device_t dev) */ index = 0; - /* 0 - > SMM_DEFAULT_BASE */ + /* 0 - > 0xa0000 */ base_k = 0; - size_k = SMM_DEFAULT_BASE >> 10; - ram_resource(dev, index++, base_k, size_k); - - /* SMM_DEFAULT_BASE -> SMM_DEFAULT_BASE + SMM_DEFAULT_SIZE */ - resource = new_resource(dev, index++); - resource->base = SMM_DEFAULT_BASE; - resource->size = SMM_DEFAULT_SIZE; - resource->flags = IORESOURCE_MEM | IORESOURCE_FIXED | - IORESOURCE_CACHEABLE | IORESOURCE_STORED | - IORESOURCE_RESERVE | IORESOURCE_ASSIGNED; - - /* SMM_DEFAULT_BASE + SMM_DEFAULT_SIZE -> 0xa0000 */ - base_k = (SMM_DEFAULT_BASE + SMM_DEFAULT_SIZE) >> 10; size_k = (0xa0000 >> 10) - base_k; ram_resource(dev, index++, base_k, size_k); |