diff options
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c | 4 | ||||
| -rw-r--r-- | src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c index 999d5a812e..fcba7c1457 100644 --- a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c +++ b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c @@ -19,12 +19,12 @@ #include <console/console.h> #include <bootstate.h> #include <cbmem.h> +#include <cf9_reset.h> #include <device/device.h> #include <southbridge/intel/fsp_rangeley/pci_devs.h> #include <drivers/intel/fsp1_0/fsp_util.h> #include <fspvpd.h> #include <fspbootmode.h> -#include <reset.h> #include "../chip.h" #ifdef __PRE_RAM__ @@ -173,7 +173,7 @@ void ChipsetFspReturnPoint(EFI_STATUS Status, *(void **)CBMEM_FSP_HOB_PTR = HobListPtr; if (Status == 0xFFFFFFFF) { - soft_reset(); + system_reset(); } romstage_main_continue(Status, HobListPtr); } diff --git a/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c index eb316555fb..24fdc7497b 100644 --- a/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c +++ b/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c @@ -18,11 +18,11 @@ #include <console/console.h> #include <bootstate.h> #include <cbmem.h> +#include <cf9_reset.h> #include <device/device.h> #include <southbridge_pci_devs.h> #include <fsp_util.h> #include "../chip.h" -#include <reset.h> #ifdef __PRE_RAM__ @@ -97,7 +97,7 @@ void ChipsetFspReturnPoint(EFI_STATUS Status, { *(void **)CBMEM_FSP_HOB_PTR = HobListPtr; if (Status == 0xFFFFFFFF) { - hard_reset(); + system_reset(); } romstage_main_continue(Status, HobListPtr); } |