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-rw-r--r--src/northbridge/intel/pineview/acpi/hostbridge.asl14
-rw-r--r--src/northbridge/intel/pineview/acpi/peg.asl5
-rw-r--r--src/northbridge/intel/pineview/acpi/pineview.asl4
3 files changed, 9 insertions, 14 deletions
diff --git a/src/northbridge/intel/pineview/acpi/hostbridge.asl b/src/northbridge/intel/pineview/acpi/hostbridge.asl
index 434ed07176..0a9897c69d 100644
--- a/src/northbridge/intel/pineview/acpi/hostbridge.asl
+++ b/src/northbridge/intel/pineview/acpi/hostbridge.asl
@@ -24,7 +24,7 @@ Device (MCHC)
, 13,
MHBR, 22, /* MCHBAR */
- Offset (0x60), /* PCIec BAR */
+ Offset (0x60), /* PCIe BAR */
PXEN, 1, /* Enable */
PXSZ, 2, /* BAR size */
, 23,
@@ -35,7 +35,7 @@ Device (MCHC)
, 11, /*
DMBR, 20, /* DMIBAR */
- // ...
+ /* ... */
Offset (0x90), /* PAM0 */
, 4,
@@ -73,18 +73,14 @@ Device (MCHC)
, 2,
Offset (0xa0), /* Top of Memory */
- TOM, 8,
+ TOM, 8,
Offset (0xb0), /* Top of Low Used Memory */
, 4,
TLUD, 12,
-
}
-
}
-
-/* Current Resource Settings */
Name (MCRS, ResourceTemplate()
{
/* Bus Numbers */
@@ -199,6 +195,7 @@ Name (MCRS, ResourceTemplate()
0x00005000,,, TPMR)
})
+/* Current Resource Settings */
Method (_CRS, 0, Serialized)
{
/* Find PCI resource area in MCRS */
@@ -206,7 +203,8 @@ Method (_CRS, 0, Serialized)
CreateDwordField(MCRS, ^PM01._MAX, PMAX)
CreateDwordField(MCRS, ^PM01._LEN, PLEN)
- /* Fix up PCI memory region:
+ /*
+ * Fix up PCI memory region:
* Enter actual TOLUD. The TOLUD register contains bits 27-31 of
* the top of memory address.
*/
diff --git a/src/northbridge/intel/pineview/acpi/peg.asl b/src/northbridge/intel/pineview/acpi/peg.asl
index f85a22c08b..6a67238317 100644
--- a/src/northbridge/intel/pineview/acpi/peg.asl
+++ b/src/northbridge/intel/pineview/acpi/peg.asl
@@ -12,16 +12,15 @@ Device (PEGP)
Package() { 0x0000ffff, 0, 0, 16 },
Package() { 0x0000ffff, 1, 0, 17 },
Package() { 0x0000ffff, 2, 0, 18 },
- Package() { 0x0000ffff, 3, 0, 19 }
+ Package() { 0x0000ffff, 3, 0, 19 },
})
} Else {
Return (Package() {
Package() { 0x0000ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
Package() { 0x0000ffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
Package() { 0x0000ffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
- Package() { 0x0000ffff, 3, \_SB.PCI0.LPCB.LNKD, 0 }
+ Package() { 0x0000ffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
})
}
-
}
}
diff --git a/src/northbridge/intel/pineview/acpi/pineview.asl b/src/northbridge/intel/pineview/acpi/pineview.asl
index 074e9007d7..3579a260b9 100644
--- a/src/northbridge/intel/pineview/acpi/pineview.asl
+++ b/src/northbridge/intel/pineview/acpi/pineview.asl
@@ -10,9 +10,7 @@ Device (PDRC)
Name (_HID, EISAID("PNP0C02"))
Name (_UID, 1)
- /* This does not seem to work correctly yet - set values statically for
- * now.
- */
+ /* This does not seem to work correctly yet - set values statically for now. */
Name (PDRS, ResourceTemplate() {
Memory32Fixed(ReadWrite, DEFAULT_RCBA, 0x00004000)