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-rw-r--r--src/northbridge/intel/haswell/haswell.h1
-rw-r--r--src/northbridge/intel/haswell/raminit.h3
-rw-r--r--src/northbridge/intel/haswell/romstage.c8
3 files changed, 9 insertions, 3 deletions
diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h
index 7fb24c8935..24d773f368 100644
--- a/src/northbridge/intel/haswell/haswell.h
+++ b/src/northbridge/intel/haswell/haswell.h
@@ -192,7 +192,6 @@ void intel_northbridge_haswell_finalize_smm(void);
struct pei_data;
struct romstage_params {
struct pei_data *pei_data;
- void (*copy_spd)(struct pei_data *peid);
};
void romstage_common(const struct romstage_params *params);
void mb_late_romstage_setup(void); /* optional */
diff --git a/src/northbridge/intel/haswell/raminit.h b/src/northbridge/intel/haswell/raminit.h
index 562c24d5b6..920ee0fabd 100644
--- a/src/northbridge/intel/haswell/raminit.h
+++ b/src/northbridge/intel/haswell/raminit.h
@@ -5,6 +5,9 @@
#include "pei_data.h"
+/* Optional function to copy SPD data for on-board memory */
+void copy_spd(struct pei_data *peid);
+
void sdram_initialize(struct pei_data *pei_data);
void setup_sdram_meminfo(struct pei_data *pei_data);
int fixup_haswell_errata(void);
diff --git a/src/northbridge/intel/haswell/romstage.c b/src/northbridge/intel/haswell/romstage.c
index ae9d707d90..00f5f47938 100644
--- a/src/northbridge/intel/haswell/romstage.c
+++ b/src/northbridge/intel/haswell/romstage.c
@@ -13,6 +13,11 @@
#include <southbridge/intel/lynxpoint/pch.h>
#include <southbridge/intel/lynxpoint/me.h>
+/* Copy SPD data for on-board memory */
+void __weak copy_spd(struct pei_data *peid)
+{
+}
+
void __weak mb_late_romstage_setup(void)
{
}
@@ -53,8 +58,7 @@ void romstage_common(const struct romstage_params *params)
report_platform_info();
- if (params->copy_spd != NULL)
- params->copy_spd(params->pei_data);
+ copy_spd(params->pei_data);
sdram_initialize(params->pei_data);