diff options
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/amdfam10/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/northbridge/amd/amdfam10/debug.c | 2 | ||||
| -rw-r--r-- | src/northbridge/amd/amdfam10/get_pci1234.c | 1 | ||||
| -rw-r--r-- | src/northbridge/amd/amdfam10/northbridge.h | 1 | ||||
| -rw-r--r-- | src/northbridge/amd/amdk8/raminit_f.c | 4 | ||||
| -rw-r--r-- | src/northbridge/amd/amdk8/raminit_f_dqs.c | 2 | ||||
| -rw-r--r-- | src/northbridge/amd/amdmct/mct/mct_d.c | 4 | ||||
| -rw-r--r-- | src/northbridge/intel/i3100/raminit.c | 2 | ||||
| -rw-r--r-- | src/northbridge/via/vx800/vga.c | 2 |
9 files changed, 11 insertions, 8 deletions
diff --git a/src/northbridge/amd/amdfam10/Makefile.inc b/src/northbridge/amd/amdfam10/Makefile.inc index 54dc2e97b4..c73f82a52c 100644 --- a/src/northbridge/amd/amdfam10/Makefile.inc +++ b/src/northbridge/amd/amdfam10/Makefile.inc @@ -10,4 +10,3 @@ obj-$(CONFIG_GENERATE_ACPI_TABLES) += sspr4.o obj-$(CONFIG_GENERATE_ACPI_TABLES) += sspr5.o obj-y += get_pci1234.o - diff --git a/src/northbridge/amd/amdfam10/debug.c b/src/northbridge/amd/amdfam10/debug.c index cab2ec86d9..7aa7751820 100644 --- a/src/northbridge/amd/amdfam10/debug.c +++ b/src/northbridge/amd/amdfam10/debug.c @@ -26,7 +26,7 @@ static inline void print_debug_addr(const char *str, void *val) { -#if CACHE_AS_RAM_ADDRESS_DEBUG == 1 +#if defined(CACHE_AS_RAM_ADDRESS_DEBUG) && CACHE_AS_RAM_ADDRESS_DEBUG == 1 printk(BIOS_DEBUG, "------Address debug: %s%p------\n", str, val); #endif } diff --git a/src/northbridge/amd/amdfam10/get_pci1234.c b/src/northbridge/amd/amdfam10/get_pci1234.c index fa2e56065d..3c6143be2f 100644 --- a/src/northbridge/amd/amdfam10/get_pci1234.c +++ b/src/northbridge/amd/amdfam10/get_pci1234.c @@ -55,6 +55,7 @@ * */ +#include "northbridge.h" void get_pci1234(void) { diff --git a/src/northbridge/amd/amdfam10/northbridge.h b/src/northbridge/amd/amdfam10/northbridge.h index 053ac3bd02..c30c99f6c9 100644 --- a/src/northbridge/amd/amdfam10/northbridge.h +++ b/src/northbridge/amd/amdfam10/northbridge.h @@ -21,5 +21,6 @@ #define NORTHBRIDGE_AMD_AMDFAM10_H u32 amdfam10_scan_root_bus(device_t root, u32 max); +void get_pci1234(void); #endif /* NORTHBRIDGE_AMD_AMDFAM10_H */ diff --git a/src/northbridge/amd/amdk8/raminit_f.c b/src/northbridge/amd/amdk8/raminit_f.c index b89aa38d6a..6652783e66 100644 --- a/src/northbridge/amd/amdk8/raminit_f.c +++ b/src/northbridge/amd/amdk8/raminit_f.c @@ -2511,9 +2511,8 @@ static void set_misc_timing(const struct mem_controller *ctrl, struct mem_info * unsigned SlowAccessMode = 0; #endif - long dimm_mask = meminfo->dimm_mask & 0x0f; - #if CONFIG_DIMM_SUPPORT==0x0104 /* DDR2 and REG */ + long dimm_mask = meminfo->dimm_mask & 0x0f; /* for REG DIMM */ dword = 0x00111222; dwordx = 0x002f0000; @@ -2578,6 +2577,7 @@ static void set_misc_timing(const struct mem_controller *ctrl, struct mem_info * #endif #if CONFIG_DIMM_SUPPORT==0x0004 /* DDR2 and unbuffered */ + long dimm_mask = meminfo->dimm_mask & 0x0f; /* for UNBUF DIMM */ dword = 0x00111222; dwordx = 0x002f2f00; diff --git a/src/northbridge/amd/amdk8/raminit_f_dqs.c b/src/northbridge/amd/amdk8/raminit_f_dqs.c index c56e51deb0..81e38ecc6d 100644 --- a/src/northbridge/amd/amdk8/raminit_f_dqs.c +++ b/src/northbridge/amd/amdk8/raminit_f_dqs.c @@ -528,7 +528,7 @@ static unsigned TrainRcvrEn(const struct mem_controller *ctrl, unsigned Pass, st unsigned is_Width128 = sysinfo->meminfo[ctrl->node_id].is_Width128; #if K8_REV_F_SUPPORT_F0_F1_WORKAROUND == 1 - unsigned cpu_f0_f1; + unsigned cpu_f0_f1 = 0; #endif if(Pass == DQS_FIRST_PASS) { diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c index 3c4fa89e89..c56576aa6c 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d.c +++ b/src/northbridge/amd/amdmct/mct/mct_d.c @@ -42,8 +42,6 @@ static void DQSTiming_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA); static void LoadDQSSigTmgRegs_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA); -static void ResetNBECCstat_D(struct MCTStatStruc *pMCTstat, - struct DCTStatStruc *pDCTstatA); static void HTMemMapInit_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA); static void MCTMemClr_D(struct MCTStatStruc *pMCTstat, @@ -478,6 +476,8 @@ static void LoadDQSSigTmgRegs_D(struct MCTStatStruc *pMCTstat, #ifdef UNUSED_CODE static void ResetNBECCstat_D(struct MCTStatStruc *pMCTstat, + struct DCTStatStruc *pDCTstatA); +static void ResetNBECCstat_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA) { /* Clear MC4_STS for all Nodes in the system. This is required in some diff --git a/src/northbridge/intel/i3100/raminit.c b/src/northbridge/intel/i3100/raminit.c index 242dcf9105..e2c30f0d1b 100644 --- a/src/northbridge/intel/i3100/raminit.c +++ b/src/northbridge/intel/i3100/raminit.c @@ -944,7 +944,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl) u32 drc; u32 data32; u32 mode_reg; - u32 *iptr; + u32 const *iptr; u16 data16; static const struct { u32 clkgr[4]; diff --git a/src/northbridge/via/vx800/vga.c b/src/northbridge/via/vx800/vga.c index 7bdc3418f1..cd33770823 100644 --- a/src/northbridge/via/vx800/vga.c +++ b/src/northbridge/via/vx800/vga.c @@ -126,6 +126,7 @@ static int via_vx800_int15_handler(struct eregs *regs) return res; } +#ifdef UNUSED_CODE void write_protect_vgabios(void) { device_t dev; @@ -141,6 +142,7 @@ void write_protect_vgabios(void) //if(dev) // pci_write_config8(dev, 0x61, 0xff); */ } +#endif extern u8 acpi_sleep_type; static void vga_init(device_t dev) |