1 files changed, 28 insertions, 14 deletions
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index ad492e0353..e3da2553b9 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -126,20 +126,34 @@ struct soc_amd_picasso_config {
 	uint32_t telemetry_vddcr_soc_slope;
 	uint32_t telemetry_vddcr_soc_offset;
 
-	enum {
-		SD_EMMC_DISABLE,
-		SD_EMMC_SD_LOW_SPEED,
-		SD_EMMC_SD_HIGH_SPEED,
-		SD_EMMC_SD_UHS_I_SDR_50,
-		SD_EMMC_SD_UHS_I_DDR_50,
-		SD_EMMC_SD_UHS_I_SDR_104,
-		SD_EMMC_EMMC_SDR_26,
-		SD_EMMC_EMMC_SDR_52,
-		SD_EMMC_EMMC_DDR_52,
-		SD_EMMC_EMMC_HS200,
-		SD_EMMC_EMMC_HS400,
-		SD_EMMC_EMMC_HS300,
-	} sd_emmc_config;
+	struct {
+		/*
+		 * SDHCI doesn't directly support eMMC. There is an implicit mapping between
+		 * eMMC timing modes and SDHCI UHS-I timing modes defined in the linux
+		 * kernel.
+		 *
+		 *  HS    -> UHS_SDR12 (0x00)
+		 *  DDR52 -> UHS_DDR50 (0x04)
+		 *  HS200 -> UHS_SDR104 (0x03)
+		 *  HS400 -> NONE (0x05)
+		 *
+		 * The kernel driver uses a heuristic to determine if HS400 is supported.
+		*/
+		enum {
+			SD_EMMC_DISABLE,
+			SD_EMMC_SD_LOW_SPEED,
+			SD_EMMC_SD_HIGH_SPEED,
+			SD_EMMC_SD_UHS_I_SDR_50,
+			SD_EMMC_SD_UHS_I_DDR_50,
+			SD_EMMC_SD_UHS_I_SDR_104,
+			SD_EMMC_EMMC_SDR_26,
+			SD_EMMC_EMMC_SDR_52,
+			SD_EMMC_EMMC_DDR_52,
+			SD_EMMC_EMMC_HS200,
+			SD_EMMC_EMMC_HS400,
+			SD_EMMC_EMMC_HS300,
+		} timing;
+	} emmc_config;
 
 	uint8_t xhci0_force_gen1;