diff options
Diffstat (limited to 'src/soc/amd/picasso/root_complex.c')
| -rw-r--r-- | src/soc/amd/picasso/root_complex.c | 76 |
1 files changed, 73 insertions, 3 deletions
diff --git a/src/soc/amd/picasso/root_complex.c b/src/soc/amd/picasso/root_complex.c index f621eeaf31..4930a0e87f 100644 --- a/src/soc/amd/picasso/root_complex.c +++ b/src/soc/amd/picasso/root_complex.c @@ -10,7 +10,61 @@ #include <device/pci_ids.h> #include <fsp/util.h> #include <stdint.h> - +#include <soc/memmap.h> + +/* + * + * +--------------------------------+ + * | | + * | | + * | | + * | | + * | | + * | | + * | | + * reserved_dram_end +--------------------------------+ + * | | + * | verstage (if reqd) | + * | (VERSTAGE_SIZE) | + * +--------------------------------+ VERSTAGE_ADDR + * | | + * | FSP-M | + * | (FSP_M_SIZE) | + * +--------------------------------+ FSP_M_ADDR + * | |X86_RESET_VECTOR = ROMSTAGE_ADDR + ROMSTAGE_SIZE - 0x10 + * | romstage | + * | (ROMSTAGE_SIZE) | + * +--------------------------------+ ROMSTAGE_ADDR + * | bootblock | + * | (C_ENV_BOOTBLOCK_SIZE) | + * +--------------------------------+ BOOTBLOCK_ADDR + * | Unused hole | + * | (86KiB) | + * +--------------------------------+ + * | FMAP cache (FMAP_SIZE) | + * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE + PRERAM_CBMEM_CONSOLE_SIZE + 0x200 + * | Early Timestamp region (512B) | + * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE + PRERAM_CBMEM_CONSOLE_SIZE + * | Preram CBMEM console | + * | (PRERAM_CBMEM_CONSOLE_SIZE) | + * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE + * | PSP shared (vboot workbuf) | + * | (PSP_SHAREDMEM_SIZE) | + * +--------------------------------+ PSP_SHAREDMEM_BASE + * | APOB (64KiB) | + * +--------------------------------+ PSP_APOB_DRAM_ADDRESS + * | Early BSP stack | + * | (EARLYRAM_BSP_STACK_SIZE) | + * reserved_dram_start +--------------------------------+ EARLY_RESERVED_DRAM_BASE + * | DRAM | + * +--------------------------------+ 0x100000 + * | Option ROM | + * +--------------------------------+ 0xc0000 + * | Legacy VGA | + * +--------------------------------+ 0xa0000 + * | DRAM | + * +--------------------------------+ 0x0 + */ static void read_resources(struct device *dev) { uint32_t mem_usable = (uintptr_t)cbmem_top(); @@ -18,6 +72,12 @@ static void read_resources(struct device *dev) const struct hob_header *hob = fsp_get_hob_list(); const struct hob_resource *res; + uintptr_t early_reserved_dram_start, early_reserved_dram_end; + const struct memmap_early_dram *e = memmap_get_early_dram_usage(); + + early_reserved_dram_start = e->base; + early_reserved_dram_end = e->base + e->size; + /* 0x0 - 0x9ffff */ ram_resource(dev, idx++, 0, 0xa0000 / KiB); @@ -27,8 +87,18 @@ static void read_resources(struct device *dev) /* 0xc0000 - 0xfffff: Option ROM */ reserved_ram_resource(dev, idx++, 0xc0000 / KiB, 0x40000 / KiB); - /* 1MB to top of low usable RAM */ - ram_resource(dev, idx++, 1 * MiB / KiB, (mem_usable - 1 * MiB) / KiB); + /* 1MB - bottom of DRAM reserved for early coreboot usage */ + ram_resource(dev, idx++, (1 * MiB) / KiB, + (early_reserved_dram_start - (1 * MiB)) / KiB); + + /* DRAM reserved for early coreboot usage */ + reserved_ram_resource(dev, idx++, early_reserved_dram_start / KiB, + (early_reserved_dram_end - early_reserved_dram_start) / KiB); + + /* top of DRAM consumed early - low top usable RAM + * cbmem_top() accounts for low UMA and TSEG if they are used. */ + ram_resource(dev, idx++, early_reserved_dram_end / KiB, + (mem_usable - early_reserved_dram_end) / KiB); mmconf_resource(dev, MMIO_CONF_BASE); |