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Diffstat (limited to 'src/soc/amd/picasso/tsc_freq.c')
-rw-r--r--src/soc/amd/picasso/tsc_freq.c20
1 files changed, 17 insertions, 3 deletions
diff --git a/src/soc/amd/picasso/tsc_freq.c b/src/soc/amd/picasso/tsc_freq.c
index a86080cb4c..8a541fc4a2 100644
--- a/src/soc/amd/picasso/tsc_freq.c
+++ b/src/soc/amd/picasso/tsc_freq.c
@@ -7,6 +7,10 @@
static unsigned long mhz;
+/* Use this default TSC frequency when it can not be correctly calculated.
+ Higher numbers are safer as it will result in longer delays using TSC */
+#define TSC_DEFAULT_FREQ_MHZ 4000
+
unsigned long tsc_freq_mhz(void)
{
msr_t msr;
@@ -22,9 +26,19 @@ unsigned long tsc_freq_mhz(void)
if (!(msr.hi & 0x80000000))
die("Unknown error: cannot determine P-state 0\n");
- cpufid = (msr.lo & 0x3f);
- cpudid = (msr.lo & 0x1c0) >> 6;
+ cpufid = (msr.lo & 0xff);
+ cpudid = (msr.lo & 0x3f00) >> 8;
+
+ /* normally core frequency is calculated as (fid * 25) / (did / 8) */
+ if (!cpudid) {
+ mhz = TSC_DEFAULT_FREQ_MHZ;
+ printk(BIOS_ERR, "Invalid divisor, set TSC frequency to %ldMHz\n", mhz);
+ } else if ((cpudid >= 8) && (cpudid < 0x3c)) {
+ mhz = (200 * cpufid) / cpudid;
+ } else {
+ mhz = 25 * cpufid;
+ printk(BIOS_ERR, "Invalid frequency divisor 0x%x, assume 1\n", cpudid);
+ }
- mhz = (100 * (cpufid + 0x10)) / (0x01 << cpudid);
return mhz;
}