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-rw-r--r--src/soc/amd/stoneyridge/Kconfig2
-rw-r--r--src/soc/amd/stoneyridge/psp.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 14615888e3..d73f3153e8 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -47,7 +47,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_HDA
select SOC_AMD_COMMON_BLOCK_SATA
select SOC_AMD_COMMON_BLOCK_PI
- select SOC_AMD_COMMON_BLOCK_PSP
+ select SOC_AMD_COMMON_BLOCK_PSP_GEN1
select SOC_AMD_COMMON_BLOCK_CAR
select SOC_AMD_COMMON_BLOCK_S3
select SOC_AMD_COMMON_BLOCK_SMBUS
diff --git a/src/soc/amd/stoneyridge/psp.c b/src/soc/amd/stoneyridge/psp.c
index bc2d725145..88bd61d4dd 100644
--- a/src/soc/amd/stoneyridge/psp.c
+++ b/src/soc/amd/stoneyridge/psp.c
@@ -30,7 +30,7 @@ void soc_enable_psp_early(void)
pci_write_config32(SOC_PSP_DEV, PCI_COMMAND, cmd);
};
-struct psp_mbox *soc_get_mbox_address(void)
+void *soc_get_mbox_address(void)
{
uintptr_t psp_mmio;
@@ -54,5 +54,5 @@ struct psp_mbox *soc_get_mbox_address(void)
~PCI_BASE_ADDRESS_MEM_ATTR_MASK;
}
- return (struct psp_mbox *)(psp_mmio + PSP_MAILBOX_OFFSET);
+ return (void *)(psp_mmio + PSP_MAILBOX_OFFSET);
}