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-rw-r--r--src/soc/amd/stoneyridge/acpi.c30
-rw-r--r--src/soc/amd/stoneyridge/include/soc/hudson.h2
2 files changed, 32 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c
index fb97441da1..54af59b59d 100644
--- a/src/soc/amd/stoneyridge/acpi.c
+++ b/src/soc/amd/stoneyridge/acpi.c
@@ -23,6 +23,7 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <arch/io.h>
+#include <arch/ioapic.h>
#include <cbmem.h>
#include <device/device.h>
#include <soc/acpi.h>
@@ -30,6 +31,35 @@
#include <soc/nvs.h>
#include <soc/smi.h>
+unsigned long acpi_fill_madt(unsigned long current)
+{
+ /* create all subtables for processors */
+ current = acpi_create_madt_lapics(current);
+
+ /* Write Kern IOAPIC, only one */
+ current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current,
+ CONFIG_MAX_CPUS, IO_APIC_ADDR, 0);
+
+ current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current,
+ CONFIG_MAX_CPUS+1, IO_APIC2_ADDR, 24);
+
+ /* 0: mean bus 0--->ISA */
+ /* 0: PIC 0 */
+ /* 2: APIC 2 */
+ /* 5 mean: 0101 --> Edge-triggered, Active high */
+ current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
+ current, 0, 0, 2, 0);
+ current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
+ current, 0, 9, 9, 0xF);
+
+ /* create all subtables for processors */
+ current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current,
+ 0xff, 5, 1);
+ /* 1: LINT1 connect to NMI */
+
+ return current;
+}
+
/*
* Reference section 5.2.9 Fixed ACPI Description Table (FADT)
* in the ACPI 3.0b specification.
diff --git a/src/soc/amd/stoneyridge/include/soc/hudson.h b/src/soc/amd/stoneyridge/include/soc/hudson.h
index 62d5a84395..48f5e0d937 100644
--- a/src/soc/amd/stoneyridge/include/soc/hudson.h
+++ b/src/soc/amd/stoneyridge/include/soc/hudson.h
@@ -23,6 +23,8 @@
#include <device/device.h>
#include "chip.h"
+#define IO_APIC2_ADDR 0xfec20000
+
/* Offsets from ACPI_MMIO_BASE
* This is defined by AGESA, but we don't include AGESA headers to avoid
* polluting the namespace.