diff options
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/smbus.h | 2 | ||||
| -rw-r--r-- | src/soc/amd/common/block/smbus/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/common/block/smbus/smbus_early_fch.c | 20 | ||||
| -rw-r--r-- | src/soc/amd/picasso/southbridge.c | 14 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/southbridge.c | 14 |
5 files changed, 23 insertions, 28 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/smbus.h b/src/soc/amd/common/block/include/amdblocks/smbus.h index b618b78c34..773daf796c 100644 --- a/src/soc/amd/common/block/include/amdblocks/smbus.h +++ b/src/soc/amd/common/block/include/amdblocks/smbus.h @@ -47,4 +47,6 @@ #define SMBSLVDAT 0xc #define SMBTIMING 0xe +void fch_smbus_init(void); + #endif /* AMD_BLOCK_SMBUS_H */ diff --git a/src/soc/amd/common/block/smbus/Makefile.inc b/src/soc/amd/common/block/smbus/Makefile.inc index b9c7f2a51f..867465efd4 100644 --- a/src/soc/amd/common/block/smbus/Makefile.inc +++ b/src/soc/amd/common/block/smbus/Makefile.inc @@ -1,5 +1,6 @@ ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_SMBUS),y) +bootblock-y += smbus_early_fch.c romstage-y += smbus.c ramstage-y += smbus.c ramstage-y += sm.c diff --git a/src/soc/amd/common/block/smbus/smbus_early_fch.c b/src/soc/amd/common/block/smbus/smbus_early_fch.c new file mode 100644 index 0000000000..3d04778b24 --- /dev/null +++ b/src/soc/amd/common/block/smbus/smbus_early_fch.c @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <stdint.h> +#include <amdblocks/acpimmio.h> +#include <amdblocks/smbus.h> +#include <soc/southbridge.h> + +void fch_smbus_init(void) +{ + /* 400 kHz smbus speed. */ + const uint8_t smbus_speed = (66000000 / (400000 * 4)); + + pm_write8(SMB_ASF_IO_BASE, SMB_BASE_ADDR >> 8); + smbus_write8(SMBTIMING, smbus_speed); + /* Clear all SMBUS status bits */ + smbus_write8(SMBHSTSTAT, SMBHST_STAT_CLEAR); + smbus_write8(SMBSLVSTAT, SMBSLV_STAT_CLEAR); + asf_write8(SMBHSTSTAT, SMBHST_STAT_CLEAR); + asf_write8(SMBSLVSTAT, SMBSLV_STAT_CLEAR); +} diff --git a/src/soc/amd/picasso/southbridge.c b/src/soc/amd/picasso/southbridge.c index edbcb60b5f..f3424497c4 100644 --- a/src/soc/amd/picasso/southbridge.c +++ b/src/soc/amd/picasso/southbridge.c @@ -113,20 +113,6 @@ void sb_clk_output_48Mhz(void) misc_write32(MISC_CLK_CNTL1, ctrl); } -static void fch_smbus_init(void) -{ - /* 400 kHz smbus speed. */ - const uint8_t smbus_speed = (66000000 / (400000 * 4)); - - pm_write8(SMB_ASF_IO_BASE, SMB_BASE_ADDR >> 8); - smbus_write8(SMBTIMING, smbus_speed); - /* Clear all SMBUS status bits */ - smbus_write8(SMBHSTSTAT, SMBHST_STAT_CLEAR); - smbus_write8(SMBSLVSTAT, SMBSLV_STAT_CLEAR); - asf_write8(SMBHSTSTAT, SMBHST_STAT_CLEAR); - asf_write8(SMBSLVSTAT, SMBSLV_STAT_CLEAR); -} - static void lpc_configure_decodes(void) { if (CONFIG(POST_IO) && (CONFIG_POST_IO_PORT == 0x80)) diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 84872abc44..c59936d7dc 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -332,20 +332,6 @@ static void setup_misc(int *reboot) } } -static void fch_smbus_init(void) -{ - /* 400 kHz smbus speed. */ - const uint8_t smbus_speed = (66000000 / (400000 * 4)); - - pm_write8(SMB_ASF_IO_BASE, SMB_BASE_ADDR >> 8); - smbus_write8(SMBTIMING, smbus_speed); - /* Clear all SMBUS status bits */ - smbus_write8(SMBHSTSTAT, SMBHST_STAT_CLEAR); - smbus_write8(SMBSLVSTAT, SMBSLV_STAT_CLEAR); - asf_write8(SMBHSTSTAT, SMBHST_STAT_CLEAR); - asf_write8(SMBSLVSTAT, SMBSLV_STAT_CLEAR); -} - /* Before console init */ void bootblock_fch_early_init(void) { |