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-rw-r--r--src/soc/amd/picasso/acp.c14
-rw-r--r--src/soc/amd/picasso/chip.h5
-rw-r--r--src/soc/amd/picasso/include/soc/acp.h4
3 files changed, 23 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/acp.c b/src/soc/amd/picasso/acp.c
index 3272acf8f6..b598e646b2 100644
--- a/src/soc/amd/picasso/acp.c
+++ b/src/soc/amd/picasso/acp.c
@@ -15,6 +15,16 @@
#include <amdblocks/acpimmio.h>
#include <commonlib/helpers.h>
+static void acp_update32(uintptr_t bar, uint32_t reg, uint32_t and_mask, uint32_t or_mask)
+{
+ uint32_t val;
+
+ val = read32((void *)(bar + reg));
+ val &= ~and_mask;
+ val |= or_mask;
+ write32((void *)(bar + reg), val);
+}
+
static void init(struct device *dev)
{
const struct soc_amd_picasso_config *cfg;
@@ -33,6 +43,10 @@ static void init(struct device *dev)
bar = (uintptr_t)res->base;
write32((void *)(bar + ACP_I2S_PIN_CONFIG), cfg->acp_pin_cfg);
+ /* Enable ACP_PME_EN and ACP_I2S_WAKE_EN for I2S_WAKE event */
+ acp_update32(bar, ACP_I2S_WAKE_EN, WAKE_EN_MASK, !!cfg->acp_i2s_wake_enable);
+ acp_update32(bar, ACP_PME_EN, PME_EN_MASK, !!cfg->acpi_pme_enable);
+
if (cfg->acp_pin_cfg == I2S_PINS_I2S_TDM)
sb_clk_output_48Mhz(); /* Internal connection to I2S */
}
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index 1d3ee9d8c9..4891b22392 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -59,6 +59,11 @@ struct soc_amd_picasso_config {
I2S_PINS_UNCONF = 7, /* All pads will be input mode */
} acp_pin_cfg;
+ /* Enable ACP I2S wake feature (0 = disable, 1 = enable) */
+ u8 acp_i2s_wake_enable;
+ /* Enable ACP PME (0 = disable, 1 = enable) */
+ u8 acpi_pme_enable;
+
/**
* IRQ 0 - 15 have a default trigger of edge and default polarity of high.
* If you have a device that requires a different configuration you can override the
diff --git a/src/soc/amd/picasso/include/soc/acp.h b/src/soc/amd/picasso/include/soc/acp.h
index 8825da8f6c..36bd6fb68b 100644
--- a/src/soc/amd/picasso/include/soc/acp.h
+++ b/src/soc/amd/picasso/include/soc/acp.h
@@ -5,5 +5,9 @@
/* Bus A D0F5 - Audio Processor */
#define ACP_I2S_PIN_CONFIG 0x1400 /* HDA, Soundwire, I2S */
+#define ACP_I2S_WAKE_EN 0x1414
+#define WAKE_EN_MASK (1 << 0)
+#define ACP_PME_EN 0x1418
+#define PME_EN_MASK (1 << 0)
#endif /* __PI_PICASSO_ACP_H__ */