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-rw-r--r--src/soc/amd/common/block/acpi/acpi.c2
-rw-r--r--src/soc/amd/common/block/graphics/graphics.c2
-rw-r--r--src/soc/amd/common/block/hda/hda.c2
-rw-r--r--src/soc/amd/common/block/include/amdblocks/acpi.h2
-rw-r--r--src/soc/amd/common/block/pi/agesawrapper.c2
-rw-r--r--src/soc/amd/common/block/pi/amd_late_init.c2
-rw-r--r--src/soc/amd/common/block/pi/refcode_loader.c2
-rw-r--r--src/soc/amd/common/block/sata/sata.c2
-rw-r--r--src/soc/amd/picasso/acpi.c4
-rw-r--r--src/soc/amd/picasso/chip.h4
-rw-r--r--src/soc/amd/picasso/finalize.c2
-rw-r--r--src/soc/amd/picasso/i2c.c2
-rw-r--r--src/soc/amd/picasso/include/soc/acpi.h2
-rw-r--r--src/soc/amd/picasso/mca.c2
-rw-r--r--src/soc/amd/picasso/northbridge.c4
-rw-r--r--src/soc/amd/picasso/pmutil.c2
-rw-r--r--src/soc/amd/picasso/romstage.c2
-rw-r--r--src/soc/amd/picasso/smihandler.c2
-rw-r--r--src/soc/amd/stoneyridge/acpi.c4
-rw-r--r--src/soc/amd/stoneyridge/chip.h2
-rw-r--r--src/soc/amd/stoneyridge/finalize.c2
-rw-r--r--src/soc/amd/stoneyridge/i2c.c2
-rw-r--r--src/soc/amd/stoneyridge/include/soc/acpi.h2
-rw-r--r--src/soc/amd/stoneyridge/mca.c2
-rw-r--r--src/soc/amd/stoneyridge/northbridge.c4
-rw-r--r--src/soc/amd/stoneyridge/pmutil.c2
-rw-r--r--src/soc/amd/stoneyridge/romstage.c2
-rw-r--r--src/soc/amd/stoneyridge/smihandler.c2
28 files changed, 33 insertions, 33 deletions
diff --git a/src/soc/amd/common/block/acpi/acpi.c b/src/soc/amd/common/block/acpi/acpi.c
index 9d8da6e4a3..105d77b0f6 100644
--- a/src/soc/amd/common/block/acpi/acpi.c
+++ b/src/soc/amd/common/block/acpi/acpi.c
@@ -3,7 +3,7 @@
#include <amdblocks/acpimmio.h>
#include <amdblocks/acpi.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <bootmode.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/soc/amd/common/block/graphics/graphics.c b/src/soc/amd/common/block/graphics/graphics.c
index 6715a43296..a3f8a969e6 100644
--- a/src/soc/amd/common/block/graphics/graphics.c
+++ b/src/soc/amd/common/block/graphics/graphics.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* This file is part of the coreboot project. */
-#include <arch/acpi_device.h>
+#include <acpi/acpi_device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/soc/amd/common/block/hda/hda.c b/src/soc/amd/common/block/hda/hda.c
index 2028f09335..00a5aea977 100644
--- a/src/soc/amd/common/block/hda/hda.c
+++ b/src/soc/amd/common/block/hda/hda.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
-#include <arch/acpigen.h>
+#include <acpi/acpigen.h>
#include <amdblocks/hda.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/amd/common/block/include/amdblocks/acpi.h b/src/soc/amd/common/block/include/amdblocks/acpi.h
index 71e29cdd22..3304f93e7f 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpi.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpi.h
@@ -10,7 +10,7 @@
#define MMIO_ACPI_PM1_STS 0x00
#define MMIO_ACPI_PM1_EN 0x02
#define MMIO_ACPI_PM1_CNT_BLK 0x04
- /* sleep types defined in arch/x86/include/arch/acpi.h */
+ /* sleep types defined in arch/x86/include/acpi/acpi.h */
#define ACPI_PM1_CNT_SCIEN BIT(0)
#define MMIO_ACPI_PM_TMR_BLK 0x08
#define MMIO_ACPI_CPU_CONTROL 0x0c
diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c
index 2d7954fba2..8d4ff6c449 100644
--- a/src/soc/amd/common/block/pi/agesawrapper.c
+++ b/src/soc/amd/common/block/pi/agesawrapper.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <cbmem.h>
#include <console/console.h>
#include <timestamp.h>
diff --git a/src/soc/amd/common/block/pi/amd_late_init.c b/src/soc/amd/common/block/pi/amd_late_init.c
index 6cdae6b5ab..663f1e7629 100644
--- a/src/soc/amd/common/block/pi/amd_late_init.c
+++ b/src/soc/amd/common/block/pi/amd_late_init.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <bootstate.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/soc/amd/common/block/pi/refcode_loader.c b/src/soc/amd/common/block/pi/refcode_loader.c
index 191e79903e..5221b7486a 100644
--- a/src/soc/amd/common/block/pi/refcode_loader.c
+++ b/src/soc/amd/common/block/pi/refcode_loader.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/soc/amd/common/block/sata/sata.c b/src/soc/amd/common/block/sata/sata.c
index 1959d3d860..b4954c8818 100644
--- a/src/soc/amd/common/block/sata/sata.c
+++ b/src/soc/amd/common/block/sata/sata.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
-#include <arch/acpigen.h>
+#include <acpi/acpigen.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c
index 8e34c85f52..357dbcacb8 100644
--- a/src/soc/amd/picasso/acpi.c
+++ b/src/soc/amd/picasso/acpi.c
@@ -7,8 +7,8 @@
#include <string.h>
#include <console/console.h>
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <cpu/x86/smm.h>
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index 7c6823239c..c206b2e054 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -11,7 +11,7 @@
#include <soc/i2c.h>
#include <soc/iomap.h>
#include <soc/southbridge.h>
-#include <arch/acpi_device.h>
+#include <acpi/acpi_device.h>
struct soc_amd_picasso_config {
/*
@@ -33,7 +33,7 @@ struct soc_amd_picasso_config {
I2S_PINS_UNCONF = 7, /* All pads will be input mode */
} acp_pin_cfg;
- /* Options for these are in src/arch/x86/include/arch/acpi.h */
+ /* Options for these are in src/arch/x86/include/acpi/acpi.h */
uint8_t fadt_pm_profile;
uint16_t fadt_boot_arch;
uint32_t fadt_flags;
diff --git a/src/soc/amd/picasso/finalize.c b/src/soc/amd/picasso/finalize.c
index 09e9b6b4b4..15af741ea1 100644
--- a/src/soc/amd/picasso/finalize.c
+++ b/src/soc/amd/picasso/finalize.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <cpu/x86/mp.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/msr.h>
diff --git a/src/soc/amd/picasso/i2c.c b/src/soc/amd/picasso/i2c.c
index 25dab397c0..454d0c2283 100644
--- a/src/soc/amd/picasso/i2c.c
+++ b/src/soc/amd/picasso/i2c.c
@@ -2,7 +2,7 @@
/* This file is part of the coreboot project. */
#include <device/mmio.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/amd/picasso/include/soc/acpi.h b/src/soc/amd/picasso/include/soc/acpi.h
index 68321fffae..c90ce468f1 100644
--- a/src/soc/amd/picasso/include/soc/acpi.h
+++ b/src/soc/amd/picasso/include/soc/acpi.h
@@ -4,7 +4,7 @@
#ifndef __SOC_PICASSO_ACPI_H__
#define __SOC_PICASSO_ACPI_H__
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#ifndef FADT_PM_PROFILE
#define FADT_PM_PROFILE PM_UNSPECIFIED
diff --git a/src/soc/amd/picasso/mca.c b/src/soc/amd/picasso/mca.c
index cdea0058a8..64e61c04e8 100644
--- a/src/soc/amd/picasso/mca.c
+++ b/src/soc/amd/picasso/mca.c
@@ -2,7 +2,7 @@
/* This file is part of the coreboot project. */
#include <cpu/x86/msr.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <soc/cpu.h>
#include <soc/northbridge.h>
#include <console/console.h>
diff --git a/src/soc/amd/picasso/northbridge.c b/src/soc/amd/picasso/northbridge.c
index 35d46bcfb6..0f484d22b6 100644
--- a/src/soc/amd/picasso/northbridge.c
+++ b/src/soc/amd/picasso/northbridge.c
@@ -4,8 +4,8 @@
#include <amdblocks/biosram.h>
#include <device/pci_ops.h>
#include <arch/ioapic.h>
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
#include <cbmem.h>
#include <console/console.h>
#include <cpu/amd/mtrr.h>
diff --git a/src/soc/amd/picasso/pmutil.c b/src/soc/amd/picasso/pmutil.c
index a38acf2461..1db9d00a5d 100644
--- a/src/soc/amd/picasso/pmutil.c
+++ b/src/soc/amd/picasso/pmutil.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <soc/southbridge.h>
#include <amdblocks/acpimmio.h>
#include <security/vboot/vboot_common.h>
diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c
index 329429ef48..8af5821ef2 100644
--- a/src/soc/amd/picasso/romstage.c
+++ b/src/soc/amd/picasso/romstage.c
@@ -3,7 +3,7 @@
#include <arch/cpu.h>
#include <arch/romstage.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
diff --git a/src/soc/amd/picasso/smihandler.c b/src/soc/amd/picasso/smihandler.c
index d399c7d230..cf04c2eace 100644
--- a/src/soc/amd/picasso/smihandler.c
+++ b/src/soc/amd/picasso/smihandler.c
@@ -6,7 +6,7 @@
#include <cpu/x86/smm.h>
#include <cpu/x86/cache.h>
#include <cpu/amd/amd64_save_state.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <arch/hlt.h>
#include <device/pci_def.h>
#include <smmstore.h>
diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c
index cc9f634959..15b48583fe 100644
--- a/src/soc/amd/stoneyridge/acpi.c
+++ b/src/soc/amd/stoneyridge/acpi.c
@@ -7,8 +7,8 @@
#include <string.h>
#include <console/console.h>
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <cpu/x86/smm.h>
diff --git a/src/soc/amd/stoneyridge/chip.h b/src/soc/amd/stoneyridge/chip.h
index 22c8cc6547..ad89df437f 100644
--- a/src/soc/amd/stoneyridge/chip.h
+++ b/src/soc/amd/stoneyridge/chip.h
@@ -9,7 +9,7 @@
#include <commonlib/helpers.h>
#include <drivers/i2c/designware/dw_i2c.h>
#include <soc/i2c.h>
-#include <arch/acpi_device.h>
+#include <acpi/acpi_device.h>
#define MAX_NODES 1
#if CONFIG(AMD_APU_MERLINFALCON)
diff --git a/src/soc/amd/stoneyridge/finalize.c b/src/soc/amd/stoneyridge/finalize.c
index 09e9b6b4b4..15af741ea1 100644
--- a/src/soc/amd/stoneyridge/finalize.c
+++ b/src/soc/amd/stoneyridge/finalize.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <cpu/x86/mp.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/msr.h>
diff --git a/src/soc/amd/stoneyridge/i2c.c b/src/soc/amd/stoneyridge/i2c.c
index 852930a88d..5206b40537 100644
--- a/src/soc/amd/stoneyridge/i2c.c
+++ b/src/soc/amd/stoneyridge/i2c.c
@@ -2,7 +2,7 @@
/* This file is part of the coreboot project. */
#include <device/mmio.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/amd/stoneyridge/include/soc/acpi.h b/src/soc/amd/stoneyridge/include/soc/acpi.h
index 6a74f22f58..95477489b6 100644
--- a/src/soc/amd/stoneyridge/include/soc/acpi.h
+++ b/src/soc/amd/stoneyridge/include/soc/acpi.h
@@ -4,7 +4,7 @@
#ifndef __SOC_STONEYRIDGE_ACPI_H__
#define __SOC_STONEYRIDGE_ACPI_H__
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#if CONFIG(STONEYRIDGE_LEGACY_FREE)
#define FADT_BOOT_ARCH ACPI_FADT_LEGACY_FREE
diff --git a/src/soc/amd/stoneyridge/mca.c b/src/soc/amd/stoneyridge/mca.c
index 44f43b4717..14559b9b99 100644
--- a/src/soc/amd/stoneyridge/mca.c
+++ b/src/soc/amd/stoneyridge/mca.c
@@ -2,7 +2,7 @@
/* This file is part of the coreboot project. */
#include <cpu/x86/msr.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <soc/cpu.h>
#include <soc/northbridge.h>
#include <console/console.h>
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index 2aa16b6853..135abefe91 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -6,8 +6,8 @@
#include <amdblocks/hda.h>
#include <device/pci_ops.h>
#include <arch/ioapic.h>
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
#include <cbmem.h>
#include <console/console.h>
#include <cpu/amd/mtrr.h>
diff --git a/src/soc/amd/stoneyridge/pmutil.c b/src/soc/amd/stoneyridge/pmutil.c
index a38acf2461..1db9d00a5d 100644
--- a/src/soc/amd/stoneyridge/pmutil.c
+++ b/src/soc/amd/stoneyridge/pmutil.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <soc/southbridge.h>
#include <amdblocks/acpimmio.h>
#include <security/vboot/vboot_common.h>
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index 9c3154107a..131a268993 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -5,7 +5,7 @@
#include <device/pci_ops.h>
#include <arch/cpu.h>
#include <arch/romstage.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/smm.h>
diff --git a/src/soc/amd/stoneyridge/smihandler.c b/src/soc/amd/stoneyridge/smihandler.c
index 2b8afa7a88..6e5e79bded 100644
--- a/src/soc/amd/stoneyridge/smihandler.c
+++ b/src/soc/amd/stoneyridge/smihandler.c
@@ -6,7 +6,7 @@
#include <cpu/x86/smm.h>
#include <cpu/x86/cache.h>
#include <cpu/amd/amd64_save_state.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <arch/hlt.h>
#include <device/pci_def.h>
#include <smmstore.h>