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-rw-r--r--src/soc/amd/common/block/pci/amd_pci_util.c1
-rw-r--r--src/soc/amd/stoneyridge/acpi.c1
-rw-r--r--src/soc/amd/stoneyridge/enable_usbdebug.c1
-rw-r--r--src/soc/amd/stoneyridge/northbridge.c1
-rw-r--r--src/soc/amd/stoneyridge/romstage.c1
5 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/pci/amd_pci_util.c b/src/soc/amd/common/block/pci/amd_pci_util.c
index 44a2e61543..d06a8df9fa 100644
--- a/src/soc/amd/common/block/pci/amd_pci_util.c
+++ b/src/soc/amd/common/block/pci/amd_pci_util.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <amdblocks/amd_pci_util.h>
#include <pc80/i8259.h>
diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c
index ccfd0fd295..984945f3a9 100644
--- a/src/soc/amd/stoneyridge/acpi.c
+++ b/src/soc/amd/stoneyridge/acpi.c
@@ -23,6 +23,7 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <cpu/x86/smm.h>
#include <cbmem.h>
diff --git a/src/soc/amd/stoneyridge/enable_usbdebug.c b/src/soc/amd/stoneyridge/enable_usbdebug.c
index 27ac61f980..ce84a47929 100644
--- a/src/soc/amd/stoneyridge/enable_usbdebug.c
+++ b/src/soc/amd/stoneyridge/enable_usbdebug.c
@@ -18,6 +18,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_ehci.h>
#include <device/pci_def.h>
#include <soc/pci_devs.h>
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index 4a856a9fa2..9ccc2e9ef9 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -15,6 +15,7 @@
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index 9f8aed8d59..1489a57673 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cpu.h>
#include <arch/acpi.h>
#include <cpu/x86/msr.h>