diff options
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/common/block/pi/agesawrapper.c | 2 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/BiosCallOuts.c | 4 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/gpio.c | 2 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/i2c.c | 2 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/romstage.c | 4 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/southbridge.c | 8 |
6 files changed, 11 insertions, 11 deletions
diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c index 9c10fec407..d376e6db41 100644 --- a/src/soc/amd/common/block/pi/agesawrapper.c +++ b/src/soc/amd/common/block/pi/agesawrapper.c @@ -324,7 +324,7 @@ AGESA_STATUS agesawrapper_amdinitlate(void) */ AMD_LATE_PARAMS *LateParams = create_struct(&AmdParamStruct); - const struct device *dev = dev_find_slot(0, IOMMU_DEVFN); + const struct device *dev = pcidev_path_on_root(IOMMU_DEVFN); if (dev && dev->enabled) { LateParams->GnbLateConfiguration.GnbIoapicId = CONFIG_MAX_CPUS + 1; diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c index fdef166c62..018975f098 100644 --- a/src/soc/amd/stoneyridge/BiosCallOuts.c +++ b/src/soc/amd/stoneyridge/BiosCallOuts.c @@ -52,7 +52,7 @@ AGESA_STATUS agesa_fch_initenv(uint32_t Func, uintptr_t FchData, void *ConfigPtr) { AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; - const struct device *dev = dev_find_slot(0, SATA_DEVFN); + const struct device *dev = pcidev_path_on_root(SATA_DEVFN); if (StdHeader->Func == AMD_INIT_ENV) { FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData; @@ -104,7 +104,7 @@ AGESA_STATUS agesa_ReadSpd(uint32_t Func, uintptr_t Data, void *ConfigPtr) if (!ENV_ROMSTAGE) return AGESA_UNSUPPORTED; - dev = dev_find_slot(0, DCT_DEVFN); + dev = pcidev_path_on_root(DCT_DEVFN); if (dev == NULL) return AGESA_ERROR; diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c index 3eaa3a03c8..955cc6a0cc 100644 --- a/src/soc/amd/stoneyridge/gpio.c +++ b/src/soc/amd/stoneyridge/gpio.c @@ -347,7 +347,7 @@ static void restore_i2c_pin_registers(uint8_t gpio, void sb_reset_i2c_slaves(void) { const struct soc_amd_stoneyridge_config *cfg; - const struct device *dev = dev_find_slot(0, GNB_DEVFN); + const struct device *dev = pcidev_path_on_root(GNB_DEVFN); struct soc_amd_i2c_save save_table[saved_pins_count]; uint8_t i, j, control; diff --git a/src/soc/amd/stoneyridge/i2c.c b/src/soc/amd/stoneyridge/i2c.c index b90e5d7857..45057a0b2e 100644 --- a/src/soc/amd/stoneyridge/i2c.c +++ b/src/soc/amd/stoneyridge/i2c.c @@ -45,7 +45,7 @@ uintptr_t dw_i2c_base_address(unsigned int bus) static const struct soc_amd_stoneyridge_config *get_soc_config(void) { - const struct device *dev = dev_find_slot(0, GNB_DEVFN); + const struct device *dev = pcidev_path_on_root(GNB_DEVFN); if (!dev || !dev->chip_info) { printk(BIOS_ERR, "%s: Could not find SoC devicetree config!\n", diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index 931448869e..9f8aed8d59 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -187,7 +187,7 @@ asmlinkage void car_stage_entry(void) void SetMemParams(AMD_POST_PARAMS *PostParams) { const struct soc_amd_stoneyridge_config *cfg; - const struct device *dev = dev_find_slot(0, GNB_DEVFN); + const struct device *dev = pcidev_path_on_root(GNB_DEVFN); if (!dev || !dev->chip_info) { printk(BIOS_ERR, "ERROR: Cannot find SoC devicetree config\n"); @@ -224,7 +224,7 @@ void SetMemParams(AMD_POST_PARAMS *PostParams) void soc_customize_init_early(AMD_EARLY_PARAMS *InitEarly) { const struct soc_amd_stoneyridge_config *cfg; - const struct device *dev = dev_find_slot(0, GNB_DEVFN); + const struct device *dev = pcidev_path_on_root(GNB_DEVFN); struct _PLATFORM_CONFIGURATION *platform; if (!dev || !dev->chip_info) { diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index f56123c99b..eb4188219b 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -73,7 +73,7 @@ static inline int sb_ide_enable(void) void SetFchResetParams(FCH_RESET_INTERFACE *params) { - const struct device *dev = dev_find_slot(0, SATA_DEVFN); + const struct device *dev = pcidev_path_on_root(SATA_DEVFN); params->Xhci0Enable = IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE); if (dev && dev->enabled) { params->SataEnable = sb_sata_enable(); @@ -86,7 +86,7 @@ void SetFchResetParams(FCH_RESET_INTERFACE *params) void SetFchEnvParams(FCH_INTERFACE *params) { - const struct device *dev = dev_find_slot(0, SATA_DEVFN); + const struct device *dev = pcidev_path_on_root(SATA_DEVFN); params->AzaliaController = AzEnable; params->SataClass = CONFIG_STONEYRIDGE_SATA_MODE; if (dev && dev->enabled) { @@ -904,9 +904,9 @@ static void set_sb_final_nvs(void) gnvs->aoac.ehce = is_aoac_device_enabled(FCH_AOAC_D3_STATE_USB2); gnvs->aoac.xhce = is_aoac_device_enabled(FCH_AOAC_D3_STATE_USB3); /* Rely on these being in sync with devicetree */ - sd = dev_find_slot(0, SD_DEVFN); + sd = pcidev_path_on_root(SD_DEVFN); gnvs->aoac.st_e = sd && sd->enabled ? 1 : 0; - sata = dev_find_slot(0, SATA_DEVFN); + sata = pcidev_path_on_root(SATA_DEVFN); gnvs->aoac.sd_e = sata && sata->enabled ? 1 : 0; gnvs->aoac.espi = 1; |