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+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2014 Imagination Technologies
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; version 2 of
+# the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+config CPU_IMGTEC_DANUBE
+ select CPU_MIPS32R2
+ select DYNAMIC_CBMEM
+ select HAVE_UART_MEMORY_MAPPED
+ select HAVE_UART_SPECIAL
+ bool
+
+if CPU_IMGTEC_DANUBE
+
+config BOOTBLOCK_CPU_INIT
+ string
+ default "soc/imgtec/danube/bootblock.c"
+
+config BOOTBLOCK_BASE
+ hex
+ default 0x9b000000
+
+config CBFS_ROM_OFFSET
+ # Effectively the maximum size of the bootblock
+ hex
+ default 0x4000
+
+config ROMSTAGE_BASE
+ hex
+ default 0x9b004000
+ help
+ The address where romstage is supposed to be loaded, right above the
+ bootblock.
+
+config CBMEM_CONSOLE_PRERAM_BASE
+ hex "memory address of the CBMEM console buffer"
+ default 0x9b00f800
+ help
+ Allocate 4KB to the pre-ram console buffer, we should be able to use
+ GRAM eventually and have a much larger buffer.
+
+config STACK_TOP
+ hex
+ default CBMEM_CONSOLE_PRERAM_BASE
+
+config STACK_BOTTOM
+ hex
+ default 0x9b00f000
+ help
+ Allocating 12KB for the stack, should be able to have more once GRAM
+ is available.
+
+endif