diff options
Diffstat (limited to 'src/soc/intel/apollolake/bootblock/bootblock.c')
| -rw-r--r-- | src/soc/intel/apollolake/bootblock/bootblock.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c index be07776f19..bb3b9c10e9 100644 --- a/src/soc/intel/apollolake/bootblock/bootblock.c +++ b/src/soc/intel/apollolake/bootblock/bootblock.c @@ -20,6 +20,7 @@ #include <soc/bootblock.h> #include <soc/cpu.h> #include <soc/gpio.h> +#include <soc/lpc.h> #include <soc/northbridge.h> #include <soc/pci_devs.h> #include <soc/uart.h> @@ -28,12 +29,36 @@ static const struct pad_config tpm_spi_configs[] = { PAD_CFG_NF(GPIO_106, NATIVE, DEEP, NF3), /* FST_SPI_CS2_N */ }; +static const struct pad_config lpc_gpio_configs[] = { + PAD_CFG_NF(LPC_AD0, NATIVE, DEEP, NF1), + PAD_CFG_NF(LPC_AD1, NATIVE, DEEP, NF1), + PAD_CFG_NF(LPC_AD2, NATIVE, DEEP, NF1), + PAD_CFG_NF(LPC_AD3, NATIVE, DEEP, NF1), + PAD_CFG_NF(LPC_FRAMEB, NATIVE, DEEP, NF1), + PAD_CFG_NF(LPC_CLKOUT0, UP_20K, DEEP, NF1), + PAD_CFG_NF(LPC_CLKOUT1, UP_20K, DEEP, NF1) +}; + static void tpm_enable(void) { /* Configure gpios */ gpio_configure_pads(tpm_spi_configs, ARRAY_SIZE(tpm_spi_configs)); } +static void early_lpc_enable(void) +{ + /* Enable requested fixed IO decode ranges */ + pci_write_config16(LPC_DEV, LPC_EN, LPC_EN_MC1 | LPC_EN_KB | LPC_EN_LGAME); + + /* Enable generic IO decode ranges for 0x800-0x9ff */ + /* FIXME: remove range hardcoding and/or calculate based on EC definitions */ + pci_write_config32(LPC_DEV, LPC_GEN1_DEC, ((0xff & ~3 ) << 8) | 0x800 | 1); + pci_write_config32(LPC_DEV, LPC_GEN2_DEC, ((0xff & ~3 ) << 8) | 0x900 | 1); + + /* GPIO pins need to be configured to specific native function */ + gpio_configure_pads(lpc_gpio_configs, ARRAY_SIZE(lpc_gpio_configs)); +} + void asmlinkage bootblock_c_entry(void) { device_t dev = NB_DEV_ROOT; @@ -59,4 +84,8 @@ void bootblock_soc_early_init(void) if (IS_ENABLED(CONFIG_LPC_TPM)) tpm_enable(); + + if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_LPC)) + early_lpc_enable(); + } |