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Diffstat (limited to 'src/soc/intel/apollolake')
-rw-r--r--src/soc/intel/apollolake/elog.c8
-rw-r--r--src/soc/intel/apollolake/xhci.c4
2 files changed, 10 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/elog.c b/src/soc/intel/apollolake/elog.c
index 3e82c32e69..b65ab10e6d 100644
--- a/src/soc/intel/apollolake/elog.c
+++ b/src/soc/intel/apollolake/elog.c
@@ -2,6 +2,7 @@
#include <cbmem.h>
#include <console/console.h>
+#include <device/pci_type.h>
#include <elog.h>
#include <intelblocks/pmclib.h>
#include <intelblocks/xhci.h>
@@ -24,6 +25,10 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start)
static void pch_log_wake_source(struct chipset_power_state *ps)
{
+ const struct xhci_wake_info xhci_wake_info[] = {
+ { PCH_DEVFN_XHCI, ELOG_WAKE_SOURCE_PME_XHCI },
+ };
+
/* Power Button */
if (ps->pm1_sts & PWRBTN_STS)
elog_add_event_wake(ELOG_WAKE_SOURCE_PWRBTN, 0);
@@ -42,7 +47,8 @@ static void pch_log_wake_source(struct chipset_power_state *ps)
/* XHCI */
if (ps->gpe0_sts[GPE0_A] & XHCI_PME_STS)
- pch_xhci_update_wake_event(soc_get_xhci_usb_info());
+ xhci_update_wake_event(xhci_wake_info,
+ ARRAY_SIZE(xhci_wake_info));
/* SMBUS Wake */
if (ps->gpe0_sts[GPE0_A] & SMB_WAK_STS)
diff --git a/src/soc/intel/apollolake/xhci.c b/src/soc/intel/apollolake/xhci.c
index 4584dc7085..47156f4102 100644
--- a/src/soc/intel/apollolake/xhci.c
+++ b/src/soc/intel/apollolake/xhci.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <device/pci_type.h>
#include <intelblocks/xhci.h>
#define XHCI_USB2_PORT_STATUS_REG 0x480
@@ -19,7 +20,8 @@ static const struct xhci_usb_info usb_info = {
.num_usb3_ports = XHCI_USB3_PORT_NUM,
};
-const struct xhci_usb_info *soc_get_xhci_usb_info(void)
+const struct xhci_usb_info *soc_get_xhci_usb_info(pci_devfn_t xhci_dev)
{
+ /* Apollo Lake only has one XHCI controller */
return &usb_info;
}