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-rw-r--r--src/soc/intel/apollolake/Kconfig2
-rw-r--r--src/soc/intel/apollolake/Makefile.inc1
-rw-r--r--src/soc/intel/apollolake/cpu.c7
-rw-r--r--src/soc/intel/apollolake/include/soc/pm.h14
-rw-r--r--src/soc/intel/apollolake/memmap.c2
-rw-r--r--src/soc/intel/apollolake/smihandler.c29
6 files changed, 30 insertions, 25 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 8d9f56293a..23e514901b 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -68,7 +68,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_UART
select SOC_INTEL_COMMON_BLOCK_XDCI
select SOC_INTEL_COMMON_BLOCK_XHCI
- select SOC_INTEL_COMMON_SMI
+ select SOC_INTEL_COMMON_BLOCK_SMM
select SOC_INTEL_COMMON_SPI_FLASH_PROTECT
select UDELAY_TSC
select TSC_CONSTANT_RATE
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index 619713876e..fe55ae9b5e 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -65,7 +65,6 @@ ramstage-y += spi.c
ramstage-y += pmutil.c
ramstage-y += pmc.c
ramstage-y += reset.c
-ramstage-y += smi.c
ramstage-y += sram.c
ramstage-y += spi.c
ramstage-y += xdci.c
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c
index 43f9b8381f..caf749f25f 100644
--- a/src/soc/intel/apollolake/cpu.c
+++ b/src/soc/intel/apollolake/cpu.c
@@ -25,14 +25,15 @@
#include <cpu/x86/mtrr.h>
#include <device/device.h>
#include <device/pci.h>
+#include <fsp/memmap.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/fast_spi.h>
#include <intelblocks/msr.h>
+#include <intelblocks/smm.h>
#include <reg_script.h>
#include <soc/cpu.h>
#include <soc/iomap.h>
#include <soc/pm.h>
-#include <soc/smm.h>
#include <cpu/intel/turbo.h>
static const struct reg_script core_msr_script[] = {
@@ -189,9 +190,9 @@ static const struct mp_ops mp_ops = {
.get_cpu_count = get_cpu_count,
.get_smm_info = get_smm_info,
.get_microcode_info = get_microcode_info,
- .pre_mp_smm_init = southbridge_smm_clear_state,
+ .pre_mp_smm_init = smm_southbridge_clear_state,
.relocation_handler = relocation_handler,
- .post_mp_init = southbridge_smm_enable_smi,
+ .post_mp_init = smm_southbridge_enable,
};
void apollolake_init_cpus(struct device *dev)
diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h
index 7db63f6bdc..6c189198ab 100644
--- a/src/soc/intel/apollolake/include/soc/pm.h
+++ b/src/soc/intel/apollolake/include/soc/pm.h
@@ -82,6 +82,20 @@
#define EOS (1 << SMI_EOS) /* End of SMI (deassert SMI#) */
#define GBL_SMI_EN (1 << SMI_GBL) /* Global SMI Enable */
+/* SMI_EN Params for this platform to pass to enable_smi
+ *
+ * Enable SMI generation:
+ * - on APMC writes (io 0xb2)
+ * - on writes to SLP_EN (sleep states)
+ * - on writes to GBL_RLS (bios commands)
+ * - on eSPI events (does nothing on LPC systems)
+ * No SMIs:
+ * - on microcontroller writes (io 0x62/0x66)
+ * - on TCO events
+ */
+#define ENABLE_SMI_PARAMS \
+ (APMC_EN | SLP_SMI_EN | GBL_SMI_EN | EOS | GPIO_EN)
+
#define SMI_STS 0x44
/* Bits for SMI status */
#define PMC_OCP_SMI_STS 27
diff --git a/src/soc/intel/apollolake/memmap.c b/src/soc/intel/apollolake/memmap.c
index 0f85b10aab..c54423c944 100644
--- a/src/soc/intel/apollolake/memmap.c
+++ b/src/soc/intel/apollolake/memmap.c
@@ -27,9 +27,9 @@
#include <assert.h>
#include <cbmem.h>
#include <device/pci.h>
+#include <fsp/memmap.h>
#include <soc/systemagent.h>
#include <soc/pci_devs.h>
-#include <soc/smm.h>
static uintptr_t smm_region_start(void)
{
diff --git a/src/soc/intel/apollolake/smihandler.c b/src/soc/intel/apollolake/smihandler.c
index 0272a5c3c2..f834b1da70 100644
--- a/src/soc/intel/apollolake/smihandler.c
+++ b/src/soc/intel/apollolake/smihandler.c
@@ -14,25 +14,15 @@
* GNU General Public License for more details.
*/
-#include <arch/hlt.h>
#include <arch/io.h>
-#include <console/console.h>
-#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
-#include <device/pci_def.h>
-#include <elog.h>
-#include <soc/nvs.h>
-#include <soc/pm.h>
+#include <intelblocks/smihandler.h>
#include <soc/gpio.h>
#include <soc/iomap.h>
#include <soc/pci_devs.h>
-#include <soc/intel/common/smi.h>
-#include <spi-generic.h>
-#include <stdint.h>
-#include <stdlib.h>
-#include <soc/smm.h>
+#include <soc/pm.h>
-int smm_disable_busmaster(device_t dev)
+int smihandler_disable_busmaster(device_t dev)
{
if (dev == PCH_DEV_PMC)
return 0;
@@ -47,7 +37,8 @@ const struct smm_save_state_ops *get_smm_save_state_ops(void)
void __attribute__((weak))
mainboard_smi_gpi_handler(const struct gpi_status *sts) { }
-static void southbridge_smi_gpi(const struct smm_save_state_ops *save_state_ops)
+static void southbridge_smi_gpi(
+ const struct smm_save_state_ops *save_state_ops)
{
struct gpi_status smi_sts;
@@ -59,10 +50,10 @@ static void southbridge_smi_gpi(const struct smm_save_state_ops *save_state_ops)
}
const smi_handler_t southbridge_smi[32] = {
- [SLP_SMI_STS] = southbridge_smi_sleep,
- [APM_SMI_STS] = southbridge_smi_apmc,
- [FAKE_PM1_SMI_STS] = southbridge_smi_pm1,
+ [SLP_SMI_STS] = smihandler_southbridge_sleep,
+ [APM_SMI_STS] = smihandler_southbridge_apmc,
+ [FAKE_PM1_SMI_STS] = smihandler_southbridge_pm1,
[GPIO_SMI_STS] = southbridge_smi_gpi,
- [TCO_SMI_STS] = southbridge_smi_tco,
- [PERIODIC_SMI_STS] = southbridge_smi_periodic,
+ [TCO_SMI_STS] = smihandler_southbridge_tco,
+ [PERIODIC_SMI_STS] = smihandler_southbridge_periodic,
};