diff options
Diffstat (limited to 'src/soc/intel/apollolake')
| -rw-r--r-- | src/soc/intel/apollolake/Kconfig | 5 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/chip.h | 10 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/gspi.c | 15 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/i2c.c | 15 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/soc_chip.h | 21 |
5 files changed, 37 insertions, 29 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 371d0c4cb6..42ff3bdf39 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -70,6 +70,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK select SOC_INTEL_COMMON_BLOCK_ACPI + select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG select SOC_INTEL_COMMON_BLOCK_CPU select SOC_INTEL_COMMON_BLOCK_DSP select SOC_INTEL_COMMON_BLOCK_FAST_SPI @@ -392,6 +393,10 @@ config SOC_INTEL_COMMON_BLOCK_GSPI_MAX int default 3 +config SOC_INTEL_I2C_DEV_MAX + int + default 8 + # Don't include the early page tables in RW_A or RW_B cbfs regions config RO_REGION_ONLY string diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h index af465df111..4f586acfd1 100644 --- a/src/soc/intel/apollolake/chip.h +++ b/src/soc/intel/apollolake/chip.h @@ -20,6 +20,7 @@ #define _SOC_APOLLOLAKE_CHIP_H_ #include <commonlib/helpers.h> +#include <intelblocks/chip.h> #include <intelblocks/gspi.h> #include <soc/gpe.h> #include <soc/gpio.h> @@ -31,7 +32,6 @@ #define MAX_PCIE_PORTS 6 #define CLKREQ_DISABLED 0xf -#define APOLLOLAKE_I2C_DEV_MAX 8 enum pnp_settings { PNP_PERF, @@ -40,8 +40,9 @@ enum pnp_settings { }; struct soc_intel_apollolake_config { - /* GSPI */ - struct gspi_cfg gspi[CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX]; + + /* Common structure containing soc config data required by common code*/ + struct soc_intel_common_config common_soc_config; /* * Mapping from PCIe root port to CLKREQ input on the SOC. The SOC has @@ -98,9 +99,6 @@ struct soc_intel_apollolake_config { /* Configure serial IRQ (SERIRQ) line. */ enum serirq_mode serirq_mode; - /* I2C bus configuration */ - struct dw_i2c_bus_config i2c[APOLLOLAKE_I2C_DEV_MAX]; - uint8_t gpe0_dw1; /* GPE0_63_32 STS/EN */ uint8_t gpe0_dw2; /* GPE0_95_64 STS/EN */ uint8_t gpe0_dw3; /* GPE0_127_96 STS/EN */ diff --git a/src/soc/intel/apollolake/gspi.c b/src/soc/intel/apollolake/gspi.c index 6d5f8e59dc..af32ebd5a0 100644 --- a/src/soc/intel/apollolake/gspi.c +++ b/src/soc/intel/apollolake/gspi.c @@ -24,19 +24,10 @@ const struct gspi_cfg *gspi_get_soc_cfg(void) { - DEVTREE_CONST struct soc_intel_apollolake_config *config; - int devfn = SA_DEVFN_ROOT; - DEVTREE_CONST struct device *dev = dev_find_slot(0, devfn); + const struct soc_intel_common_config *common_config; + common_config = chip_get_common_soc_structure(); - if (!dev || !dev->chip_info) { - printk(BIOS_ERR, "%s: Could not find SoC devicetree config!\n", - __func__); - return NULL; - } - - config = dev->chip_info; - - return &config->gspi[0]; + return &common_config->gspi[0]; } uintptr_t gspi_get_soc_early_base(void) diff --git a/src/soc/intel/apollolake/i2c.c b/src/soc/intel/apollolake/i2c.c index 3df333c869..bb14df2a0e 100644 --- a/src/soc/intel/apollolake/i2c.c +++ b/src/soc/intel/apollolake/i2c.c @@ -17,24 +17,17 @@ #include <device/device.h> #include <device/pci_def.h> #include <drivers/i2c/designware/dw_i2c.h> +#include <intelblocks/chip.h> #include <soc/iomap.h> #include <soc/pci_devs.h> #include "chip.h" const struct dw_i2c_bus_config *dw_i2c_get_soc_cfg(unsigned int bus) { - const struct soc_intel_apollolake_config *config; - const struct device *dev = dev_find_slot(0, SA_DEVFN_ROOT); + const struct soc_intel_common_config *common_config; + common_config = chip_get_common_soc_structure(); - if (!dev || !dev->chip_info) { - printk(BIOS_ERR, "%s: Could not find SoC devicetree config!\n", - __func__); - return NULL; - } - - config = dev->chip_info; - - return &config->i2c[bus]; + return &common_config->i2c[bus]; } uintptr_t dw_i2c_get_soc_early_base(unsigned int bus) diff --git a/src/soc/intel/apollolake/include/soc/soc_chip.h b/src/soc/intel/apollolake/include/soc/soc_chip.h new file mode 100644 index 0000000000..fa53a15906 --- /dev/null +++ b/src/soc/intel/apollolake/include/soc/soc_chip.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + */ + +#ifndef _SOC_APOLLOLAKE_SOC_CHIP_H_ +#define _SOC_APOLLOLAKE_SOC_CHIP_H_ + +#include "../../chip.h" + +#endif /* _SOC_APOLLOLAKE_SOC_CHIP_H_ */ |