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-rw-r--r--src/soc/intel/baytrail/Kconfig20
1 files changed, 8 insertions, 12 deletions
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 1f7e21e1d9..b4dc823801 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -67,22 +67,20 @@ config SMM_RESERVED_SIZE
default 0x100000
config HAVE_MRC
- bool "Add a Memory Reference Code binary"
- default y
+ bool "Add a System Agent binary"
help
- Select this option to add a blob containing
- memory reference code.
- Note: Without this binary coreboot will not work
+ Select this option to add a System Agent binary to
+ the resulting coreboot image.
-if HAVE_MRC
+ Note: Without this binary coreboot will not work
config MRC_FILE
- string "Intel memory refeference code path and filename"
- default "3rdparty/blobs/northbridge/intel/sandybridge/systemagent-r6.bin"
+ string "Intel System Agent path and filename"
+ depends on HAVE_MRC
+ default "mrc.bin"
help
The path and filename of the file to use as System Agent
- binary. Note that this points to the sandybridge binary file
- which is will not work, but it serves its purpose to do builds.
+ binary.
config MRC_BIN_ADDRESS
hex
@@ -92,8 +90,6 @@ config MRC_RMT
bool "Enable MRC RMT training + debug prints"
default n
-endif # HAVE_MRC
-
# Cache As RAM region layout:
#
# +-------------+ DCACHE_RAM_BASE + DCACHE_RAM_SIZE + DCACHE_RAM_MRC_VAR_SIZE