diff options
Diffstat (limited to 'src/soc/intel/baytrail/include')
-rw-r--r-- | src/soc/intel/baytrail/include/soc/device_nvs.h | 3 | ||||
-rw-r--r-- | src/soc/intel/baytrail/include/soc/efi_wrapper.h | 4 | ||||
-rw-r--r-- | src/soc/intel/baytrail/include/soc/gpio.h | 3 | ||||
-rw-r--r-- | src/soc/intel/baytrail/include/soc/mrc_wrapper.h | 6 | ||||
-rw-r--r-- | src/soc/intel/baytrail/include/soc/nvs.h | 3 | ||||
-rw-r--r-- | src/soc/intel/baytrail/include/soc/pmc.h | 3 |
6 files changed, 15 insertions, 7 deletions
diff --git a/src/soc/intel/baytrail/include/soc/device_nvs.h b/src/soc/intel/baytrail/include/soc/device_nvs.h index 5ac95e45b2..b4fe65e7d9 100644 --- a/src/soc/intel/baytrail/include/soc/device_nvs.h +++ b/src/soc/intel/baytrail/include/soc/device_nvs.h @@ -17,6 +17,7 @@ #define _BAYTRAIL_DEVICE_NVS_H_ #include <stdint.h> +#include <compiler.h> /* Offset in Global NVS where this structure lives */ #define DEVICE_NVS_OFFSET 0x1000 @@ -59,6 +60,6 @@ typedef struct { /* Extra */ u32 lpe_fw; /* LPE Firmware */ u8 rsvd1[3930]; /* Add padding so sizeof(device_nvs_t) == 0x1000 */ -} __attribute__((packed)) device_nvs_t; +} __packed device_nvs_t; #endif diff --git a/src/soc/intel/baytrail/include/soc/efi_wrapper.h b/src/soc/intel/baytrail/include/soc/efi_wrapper.h index 3304d03451..3425aae823 100644 --- a/src/soc/intel/baytrail/include/soc/efi_wrapper.h +++ b/src/soc/intel/baytrail/include/soc/efi_wrapper.h @@ -29,6 +29,8 @@ #ifndef __EFI_WRAPPER_H__ #define __EFI_WRAPPER_H__ +#include <compiler.h> + #define EFI_WRAPPER_VER 2 /* Provide generic x86 calling conventions. */ @@ -46,7 +48,7 @@ struct efi_wrapper_params { void ABI_X86 (*console_out)(unsigned char byte); unsigned int tsc_ticks_per_microsecond; -} __attribute__((packed)); +} __packed; typedef int ABI_X86 (*efi_wrapper_entry_t)(struct efi_wrapper_params *); #endif diff --git a/src/soc/intel/baytrail/include/soc/gpio.h b/src/soc/intel/baytrail/include/soc/gpio.h index 9c6b7fd025..0e0395a536 100644 --- a/src/soc/intel/baytrail/include/soc/gpio.h +++ b/src/soc/intel/baytrail/include/soc/gpio.h @@ -17,6 +17,7 @@ #define _BAYTRAIL_GPIO_H_ #include <stdint.h> +#include <compiler.h> #include <arch/io.h> #include <soc/iomap.h> @@ -352,7 +353,7 @@ struct soc_gpio_map { u32 smi : 1; u32 is_gpio : 1; u32 sci : 1; -} __attribute__ ((packed)); +} __packed; struct soc_gpio_config { const struct soc_gpio_map *ncore; diff --git a/src/soc/intel/baytrail/include/soc/mrc_wrapper.h b/src/soc/intel/baytrail/include/soc/mrc_wrapper.h index 355dce0706..d3547c2fb2 100644 --- a/src/soc/intel/baytrail/include/soc/mrc_wrapper.h +++ b/src/soc/intel/baytrail/include/soc/mrc_wrapper.h @@ -28,6 +28,8 @@ #ifndef _MRC_WRAPPER_H_ #define _MRC_WRAPPER_H_ +#include <compiler.h> + #define MRC_PARAMS_VER 5 #define NUM_CHANNELS 2 @@ -76,7 +78,7 @@ struct mrc_mainboard_params { int dram_odt_value; int spd_addrs[NUM_CHANNELS]; void *dram_data[NUM_CHANNELS]; /* SPD or Timing specific data. */ -} __attribute__((packed)); +} __packed; struct mrc_params { /* Mainboard Inputs */ @@ -99,7 +101,7 @@ struct mrc_params { void *txe_base_address; int data_to_save_size; void *data_to_save; -} __attribute__((packed)); +} __packed; /* Call into wrapper. */ typedef int ABI_X86 (*mrc_wrapper_entry_t)(struct mrc_params *); diff --git a/src/soc/intel/baytrail/include/soc/nvs.h b/src/soc/intel/baytrail/include/soc/nvs.h index cb4e9bf18f..8e6819d3b2 100644 --- a/src/soc/intel/baytrail/include/soc/nvs.h +++ b/src/soc/intel/baytrail/include/soc/nvs.h @@ -17,6 +17,7 @@ #ifndef _BAYTRAIL_NVS_H_ #define _BAYTRAIL_NVS_H_ +#include <compiler.h> #include <vendorcode/google/chromeos/gnvs.h> #include <soc/device_nvs.h> @@ -64,7 +65,7 @@ typedef struct { /* Baytrail LPSS (0x1000) */ device_nvs_t dev; -} __attribute__((packed)) global_nvs_t; +} __packed global_nvs_t; void acpi_create_gnvs(global_nvs_t *gnvs); #ifdef __SMM__ diff --git a/src/soc/intel/baytrail/include/soc/pmc.h b/src/soc/intel/baytrail/include/soc/pmc.h index c8d6a67a81..1059d3cd6c 100644 --- a/src/soc/intel/baytrail/include/soc/pmc.h +++ b/src/soc/intel/baytrail/include/soc/pmc.h @@ -16,6 +16,7 @@ #ifndef _BAYTRAIL_PMC_H_ #define _BAYTRAIL_PMC_H_ +#include <compiler.h> #include <arch/acpi.h> #define IOCOM1 0x3f8 @@ -262,7 +263,7 @@ struct chipset_power_state { uint32_t prsts; uint32_t gen_pmcon1; uint32_t gen_pmcon2; -} __attribute__((packed)); +} __packed; /* Power Management Utility Functions. */ uint16_t get_pmbase(void); |