diff options
Diffstat (limited to 'src/soc/intel/baytrail/scc.c')
| -rw-r--r-- | src/soc/intel/baytrail/scc.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/scc.c b/src/soc/intel/baytrail/scc.c index af941faa98..64792c2228 100644 --- a/src/soc/intel/baytrail/scc.c +++ b/src/soc/intel/baytrail/scc.c @@ -18,10 +18,15 @@ */ +#include <cbmem.h> #include <console/console.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> #include <reg_script.h> #include <baytrail/iosf.h> +#include <baytrail/nvs.h> #include <baytrail/ramstage.h> static const struct reg_script scc_start_dll[] = { @@ -81,3 +86,41 @@ void baytrail_init_scc(void) reg_script_run(scc_after_dll); } + +void scc_enable_acpi_mode(device_t dev, int iosf_reg, int nvs_index) +{ + struct reg_script ops[] = { + REG_SCRIPT_SET_DEV(dev), + /* Disable PCI interrupt, enable Memory and Bus Master */ + REG_PCI_OR32(PCI_COMMAND, + PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | (1<<10)), + /* Enable ACPI mode */ + REG_IOSF_OR(IOSF_PORT_SCC, iosf_reg, + SCC_CTL_PCI_CFG_DIS | SCC_CTL_ACPI_INT_EN), + REG_SCRIPT_END + }; + struct resource *bar; + global_nvs_t *gnvs; + + /* Find ACPI NVS to update BARs */ + gnvs = (global_nvs_t *)cbmem_find(CBMEM_ID_ACPI_GNVS); + if (!gnvs) { + printk(BIOS_ERR, "Unable to locate Global NVS\n"); + return; + } + + /* Save BAR0 and BAR1 to ACPI NVS */ + bar = find_resource(dev, PCI_BASE_ADDRESS_0); + if (bar) + gnvs->dev.scc_bar0[nvs_index] = (u32)bar->base; + + bar = find_resource(dev, PCI_BASE_ADDRESS_1); + if (bar) + gnvs->dev.scc_bar1[nvs_index] = (u32)bar->base; + + /* Device is enabled in ACPI mode */ + gnvs->dev.scc_en[nvs_index] = 1; + + /* Put device in ACPI mode */ + reg_script_run(ops); +} |