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Diffstat (limited to 'src/soc/intel/braswell/chip.h')
-rw-r--r--src/soc/intel/braswell/chip.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/chip.h b/src/soc/intel/braswell/chip.h
index e302d6cdf5..864f214008 100644
--- a/src/soc/intel/braswell/chip.h
+++ b/src/soc/intel/braswell/chip.h
@@ -38,6 +38,18 @@ enum lpe_clk_src {
LPE_CLK_SRC_PLL,
};
+enum usb_comp_bg_value {
+ USB_COMP_BG_575_MV = 7,
+ USB_COMP_BG_650_MV = 6,
+ USB_COMP_BG_550_MV = 5,
+ USB_COMP_BG_537_MV = 4,
+ USB_COMP_BG_625_MV = 3,
+ USB_COMP_BG_700_MV = 2,
+ USB_COMP_BG_600_MV = 1,
+ USB_COMP_BG_675_MV = 0,
+};
+
+
struct soc_intel_braswell_config {
uint8_t enable_xdp_tap;
uint8_t clkreq_enable;
@@ -61,6 +73,14 @@ struct soc_intel_braswell_config {
/* Allow PCIe devices to wake system from suspend. */
int pcie_wake_enable;
+ /* Program USB2_COMPBG register.
+ * [10:7] - select vref to AFE port
+ * x111 - 575mV, x110 - 650mV, x101 - 550mV, x100 - 537.5mV,
+ * x011 - 625mV, x010 - 700mV, x001 - 600mV, x000 - 675mV
+ */
+ enum usb_comp_bg_value usb_comp_bg;
+
+
/*
* The following fields come from fsp_vpd.h .aka. VpdHeader.h.
* These are configuration values that are passed to FSP during