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Diffstat (limited to 'src/soc/intel/braswell/ramstage.c')
| -rw-r--r-- | src/soc/intel/braswell/ramstage.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/braswell/ramstage.c b/src/soc/intel/braswell/ramstage.c index f8011fdb73..9b0775e9b7 100644 --- a/src/soc/intel/braswell/ramstage.c +++ b/src/soc/intel/braswell/ramstage.c @@ -1,9 +1,6 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2013 Google Inc. - * Copyright (C) 2015 Intel Corp. - * Copyright (C) 2018 Eltan B.V. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by |