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-rw-r--r--src/soc/intel/broadwell/Makefile.inc7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc
index 9d7ab1e8c3..072ab1ff07 100644
--- a/src/soc/intel/broadwell/Makefile.inc
+++ b/src/soc/intel/broadwell/Makefile.inc
@@ -10,6 +10,7 @@ subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
ramstage-y += acpi.c
+ramstage-y += adsp.c
ramstage-y += chip.c
ramstage-y += cpu.c
ramstage-y += elog.c
@@ -62,6 +63,12 @@ ramstage-y += ehci.c
ramstage-y += xhci.c
smm-y += xhci.c
+ifeq ($(CONFIG_USBDEBUG),y)
+ramstage-y += usbdebug.c
+romstage-y += usbdebug.c
+smm-y += usbdebug.c
+endif
+
INCLUDES += -Isrc/soc/intel/broadwell/
# Run an intermediate step when producing coreboot.rom