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-rw-r--r--src/soc/intel/broadwell/cpu.c3
-rw-r--r--src/soc/intel/broadwell/include/soc/smm.h18
-rw-r--r--src/soc/intel/broadwell/smi.c9
-rw-r--r--src/soc/intel/broadwell/smmrelocate.c3
4 files changed, 9 insertions, 24 deletions
diff --git a/src/soc/intel/broadwell/cpu.c b/src/soc/intel/broadwell/cpu.c
index 5ccaeaf810..54a695eec1 100644
--- a/src/soc/intel/broadwell/cpu.c
+++ b/src/soc/intel/broadwell/cpu.c
@@ -24,6 +24,7 @@
#include <cpu/x86/lapic.h>
#include <cpu/x86/mp.h>
#include <cpu/intel/microcode.h>
+#include <cpu/intel/smm_reloc.h>
#include <cpu/intel/speedstep.h>
#include <cpu/intel/turbo.h>
#include <cpu/x86/cache.h>
@@ -651,7 +652,7 @@ static void post_mp_init(void)
/* Now that all APs have been relocated as well as the BSP let SMIs
* start flowing. */
- southbridge_smm_enable_smi();
+ smm_southbridge_enable_smi();
/* Lock down the SMRAM space. */
smm_lock();
diff --git a/src/soc/intel/broadwell/include/soc/smm.h b/src/soc/intel/broadwell/include/soc/smm.h
index d3e1cddb81..29857b7671 100644
--- a/src/soc/intel/broadwell/include/soc/smm.h
+++ b/src/soc/intel/broadwell/include/soc/smm.h
@@ -53,22 +53,4 @@ static inline int smm_region_size(void)
return CONFIG_SMM_TSEG_SIZE;
}
-void smm_relocation_handler(int cpu, uintptr_t curr_smbase,
- uintptr_t staggered_smbase);
-void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
- size_t *smm_save_state_size);
-void smm_initialize(void);
-void smm_relocate(void);
-void smm_lock(void);
-
-/* These helpers are for performing SMM relocation. */
-void southbridge_trigger_smi(void);
-void southbridge_clear_smi_status(void);
-
-/* The initialization of the southbridge is split into 2 components. One is
- * for clearing the state in the SMM registers. The other is for enabling
- * SMIs. They are split so that other work between the 2 actions. */
-void southbridge_smm_clear_state(void);
-void southbridge_smm_enable_smi(void);
-
#endif
diff --git a/src/soc/intel/broadwell/smi.c b/src/soc/intel/broadwell/smi.c
index 9aab0d10a6..17196da438 100644
--- a/src/soc/intel/broadwell/smi.c
+++ b/src/soc/intel/broadwell/smi.c
@@ -20,12 +20,13 @@
#include <arch/io.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
+#include <cpu/intel/smm_reloc.h>
#include <soc/iomap.h>
#include <soc/pch.h>
#include <soc/pm.h>
#include <soc/smm.h>
-void southbridge_smm_clear_state(void)
+void smm_southbridge_clear_state(void)
{
u32 smi_en;
@@ -47,7 +48,7 @@ void southbridge_smm_clear_state(void)
clear_gpe_status();
}
-void southbridge_smm_enable_smi(void)
+void smm_southbridge_enable_smi(void)
{
printk(BIOS_DEBUG, "Enabling SMIs.\n");
/* Configure events */
@@ -65,7 +66,7 @@ void southbridge_smm_enable_smi(void)
enable_smi(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | EOS);
}
-void southbridge_trigger_smi(void)
+static void __unused southbridge_trigger_smi(void)
{
/**
* There are several methods of raising a controlled SMI# via
@@ -85,7 +86,7 @@ void southbridge_trigger_smi(void)
outb(0x00, 0xb2);
}
-void southbridge_clear_smi_status(void)
+static void __unused southbridge_clear_smi_status(void)
{
/* Clear SMI status */
clear_smi_status();
diff --git a/src/soc/intel/broadwell/smmrelocate.c b/src/soc/intel/broadwell/smmrelocate.c
index 228cccd7b1..61b0c4cdce 100644
--- a/src/soc/intel/broadwell/smmrelocate.c
+++ b/src/soc/intel/broadwell/smmrelocate.c
@@ -25,6 +25,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/smm.h>
#include <cpu/intel/em64t101_save_state.h>
+#include <cpu/intel/smm_reloc.h>
#include <console/console.h>
#include <soc/cpu.h>
#include <soc/msr.h>
@@ -287,7 +288,7 @@ void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
void smm_initialize(void)
{
/* Clear the SMM state in the southbridge. */
- southbridge_smm_clear_state();
+ smm_southbridge_clear_state();
/*
* Run the relocation handler for on the BSP to check and set up