diff options
Diffstat (limited to 'src/soc/intel/cannonlake/bootblock')
-rw-r--r-- | src/soc/intel/cannonlake/bootblock/bootblock.c | 5 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/bootblock/pch.c | 1 |
2 files changed, 4 insertions, 2 deletions
diff --git a/src/soc/intel/cannonlake/bootblock/bootblock.c b/src/soc/intel/cannonlake/bootblock/bootblock.c index b7e77976b0..0aac186b42 100644 --- a/src/soc/intel/cannonlake/bootblock/bootblock.c +++ b/src/soc/intel/cannonlake/bootblock/bootblock.c @@ -15,6 +15,7 @@ #include <bootblock_common.h> #include <intelblocks/gspi.h> +#include <intelblocks/uart.h> #include <soc/bootblock.h> #include <soc/iomap.h> #include <soc/pch.h> @@ -31,8 +32,8 @@ void bootblock_soc_early_init(void) bootblock_pch_early_init(); bootblock_cpu_init(); pch_early_iorange_init(); - if (IS_ENABLED(CONFIG_DRIVERS_UART_8250MEM)) - pch_uart_init(); + if (IS_ENABLED(CONFIG_UART_DEBUG)) + uart_bootblock_init(); } void bootblock_soc_init(void) diff --git a/src/soc/intel/cannonlake/bootblock/pch.c b/src/soc/intel/cannonlake/bootblock/pch.c index eb67012781..033f69aaf5 100644 --- a/src/soc/intel/cannonlake/bootblock/pch.c +++ b/src/soc/intel/cannonlake/bootblock/pch.c @@ -80,6 +80,7 @@ void bootblock_pch_early_init(void) gspi_early_bar_init(); p2sb_enable_bar(); p2sb_configure_hpet(); + /* * Enabling PWRM Base for accessing * Global Reset Cause Register. |