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Diffstat (limited to 'src/soc/intel/cannonlake/cpu.c')
-rw-r--r--src/soc/intel/cannonlake/cpu.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c
index 0f4d52e790..c58b9ad693 100644
--- a/src/soc/intel/cannonlake/cpu.c
+++ b/src/soc/intel/cannonlake/cpu.c
@@ -106,7 +106,7 @@ void set_power_limits(u8 power_limit_1_time)
unsigned int tdp, min_power, max_power, max_time, tdp_pl2, tdp_pl1;
u8 power_limit_1_val;
- config_t *conf = config_of_path(SA_DEVFN_ROOT);
+ config_t *conf = config_of_soc();
if (power_limit_1_time >= ARRAY_SIZE(power_limit_time_sec_to_msr))
power_limit_1_time = ARRAY_SIZE(power_limit_time_sec_to_msr) - 1;
@@ -234,7 +234,7 @@ static void soc_fsp_load(void)
static void configure_isst(void)
{
- config_t *conf = config_of_path(SA_DEVFN_ROOT);
+ config_t *conf = config_of_soc();
msr_t msr;
if (conf->speed_shift_enable) {
@@ -259,7 +259,7 @@ static void configure_isst(void)
static void configure_misc(void)
{
- config_t *conf = config_of_path(SA_DEVFN_ROOT);
+ config_t *conf = config_of_soc();
msr_t msr;
msr = rdmsr(IA32_MISC_ENABLE);
@@ -361,7 +361,7 @@ static void configure_c_states(void)
static void configure_thermal_target(void)
{
- config_t *conf = config_of_path(SA_DEVFN_ROOT);
+ config_t *conf = config_of_soc();
msr_t msr;
/* Set TCC activation offset if supported */
@@ -387,7 +387,7 @@ static void enable_pm_timer_emulation(void)
const struct soc_intel_cannonlake_config *config;
msr_t msr;
- config = config_of_path(SA_DEVFN_ROOT);
+ config = config_of_soc();
/* Enable PM timer emulation only if ACPI PM timer is disabled */
if (!config->PmTimerDisabled)