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-rw-r--r--src/soc/intel/cannonlake/chip.h3
-rw-r--r--src/soc/intel/cannonlake/smihandler.c10
2 files changed, 5 insertions, 8 deletions
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index 2a52627be7..a084f67b46 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -253,9 +253,6 @@ struct soc_intel_cannonlake_config {
* 0 = System Agent, 1 = IA Core, 2 = Ring,
* 3 = GT unsliced, 4 = GT sliced */
struct vr_config domain_vr_config[NUM_VR_DOMAINS];
- /* HeciEnabled decides the state of Heci1 at end of boot
- * Setting to 0 (default) disables Heci1 and hides the device from OS */
- uint8_t HeciEnabled;
/* Enables support for Teton Glacier hybrid storage device */
uint8_t TetonGlacierMode;
diff --git a/src/soc/intel/cannonlake/smihandler.c b/src/soc/intel/cannonlake/smihandler.c
index 266c258966..dd8db5b1f5 100644
--- a/src/soc/intel/cannonlake/smihandler.c
+++ b/src/soc/intel/cannonlake/smihandler.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h>
-#include <device/pci_def.h>
+#include <device/device.h>
#include <intelblocks/cse.h>
#include <intelblocks/smihandler.h>
#include <soc/soc_chip.h>
@@ -17,11 +17,11 @@
*/
void smihandler_soc_at_finalize(void)
{
- const struct soc_intel_cannonlake_config *config;
+ if (!CONFIG(HECI_DISABLE_USING_SMM))
+ return;
- config = config_of_soc();
-
- if (!config->HeciEnabled && CONFIG(HECI_DISABLE_USING_SMM))
+ const struct device *dev = pcidev_path_on_root(PCH_DEVFN_CSE);
+ if (!is_dev_enabled(dev))
heci_disable();
}