diff options
Diffstat (limited to 'src/soc/intel/common/block/i2c/i2c.c')
| -rw-r--r-- | src/soc/intel/common/block/i2c/i2c.c | 110 |
1 files changed, 104 insertions, 6 deletions
diff --git a/src/soc/intel/common/block/i2c/i2c.c b/src/soc/intel/common/block/i2c/i2c.c index 7dd40db146..11bd018c8b 100644 --- a/src/soc/intel/common/block/i2c/i2c.c +++ b/src/soc/intel/common/block/i2c/i2c.c @@ -13,10 +13,113 @@ * GNU General Public License for more details. */ +#include <arch/io.h> +#include <console/console.h> +#include <device/device.h> +#include <device/i2c_simple.h> #include <device/pci.h> #include <device/pci_def.h> #include <device/pci_ids.h> #include <drivers/i2c/designware/dw_i2c.h> +#include <intelblocks/chip.h> +#include <intelblocks/lpss.h> +#include <soc/iomap.h> +#include <soc/pci_devs.h> + +int dw_i2c_soc_dev_to_bus(struct device *dev) +{ + pci_devfn_t devfn = dev->path.pci.devfn; + return dw_i2c_soc_devfn_to_bus(devfn); +} + +/* Getting I2C bus configuration from devicetree config */ +const struct dw_i2c_bus_config *dw_i2c_get_soc_cfg(unsigned int bus) +{ + const struct soc_intel_common_config *common_config; + common_config = chip_get_common_soc_structure(); + + return &common_config->i2c[bus]; +} + +/* Get base address for early init of I2C controllers. */ +uintptr_t dw_i2c_get_soc_early_base(unsigned int bus) +{ + return EARLY_I2C_BASE(bus); +} + +#if !ENV_RAMSTAGE +static int lpss_i2c_early_init_bus(unsigned int bus) +{ + const struct dw_i2c_bus_config *config; + const struct device *tree_dev; + pci_devfn_t dev; + int devfn; + uintptr_t base; + + /* Find the PCI device for this bus controller */ + devfn = dw_i2c_soc_bus_to_devfn(bus); + if (devfn < 0) { + printk(BIOS_ERR, "I2C%u device not found\n", bus); + return -1; + } + + /* Look up the controller device in the devicetree */ + dev = PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn)); + tree_dev = dev_find_slot(0, devfn); + if (!tree_dev || !tree_dev->enabled) { + printk(BIOS_ERR, "I2C%u device not enabled\n", bus); + return -1; + } + + /* Skip if not enabled for early init */ + config = dw_i2c_get_soc_cfg(bus); + if (!config || !config->early_init) { + printk(BIOS_DEBUG, "I2C%u not enabled for early init\n", bus); + return -1; + } + + /* Prepare early base address for access before memory */ + base = dw_i2c_get_soc_early_base(bus); + pci_write_config32(dev, PCI_BASE_ADDRESS_0, base); + pci_write_config32(dev, PCI_COMMAND, + PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); + + /* Take device out of reset */ + lpss_reset_release(base); + + /* Initialize the controller */ + if (dw_i2c_init(bus, config) < 0) { + printk(BIOS_ERR, "I2C%u failed to initialize\n", bus); + return -1; + } + + return 0; +} + +uintptr_t dw_i2c_base_address(unsigned int bus) +{ + int devfn; + pci_devfn_t dev; + uintptr_t base; + + /* Find device+function for this controller */ + devfn = dw_i2c_soc_bus_to_devfn(bus); + if (devfn < 0) + return (uintptr_t)NULL; + + /* Form a PCI address for this device */ + dev = PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn)); + + /* Read the first base address for this device */ + base = ALIGN_DOWN(pci_read_config32(dev, PCI_BASE_ADDRESS_0), 16); + + /* Attempt to initialize bus if base is not set yet */ + if (!base && !lpss_i2c_early_init_bus(bus)) + base = ALIGN_DOWN(pci_read_config32(dev, PCI_BASE_ADDRESS_0), + 16); + return base; +} +#else uintptr_t dw_i2c_base_address(unsigned int bus) { @@ -43,12 +146,6 @@ uintptr_t dw_i2c_base_address(unsigned int bus) return (uintptr_t)NULL; } -int dw_i2c_soc_dev_to_bus(struct device *dev) -{ - pci_devfn_t devfn = dev->path.pci.devfn; - return dw_i2c_soc_devfn_to_bus(devfn); -} - static struct device_operations i2c_dev_ops = { .read_resources = &pci_dev_read_resources, .set_resources = &pci_dev_set_resources, @@ -101,3 +198,4 @@ static const struct pci_driver pch_i2c __pci_driver = { .vendor = PCI_VENDOR_ID_INTEL, .devices = pci_device_ids, }; +#endif |